Design Of Image Processing System Based On FPGA

Image processing system becomes a highly integrated data processing system with high speed and accuracy. There is a increasingly high demand on the smaller size, lower power consumption, higher speed and update capabilities. Using merely DSP or ASIC to implement Image processing system has been difficult to meet these needs. A large number of proven, FPGA's parallel processing capabilities and pipelining can significantly improve image processing speed, the need to use reconfigurable FPGA-based processor to accelerate image processing applications becomes more and more important, for these reason, this paper do research on FPGA-based image processing system and related work.First of all, considering FPGA's computing resource, logic resource, granularity, high-performance FPGA prototype verification system DE3 carrying out image processing system as the hardware platform, this paper adopts multi-level pipelining and parallel processing architecture, a rich advantage of FPGA logic and on-chip DSP resources are used to achieve a statistical sorting filter, spatial filtering, which require high processing speed but involves volume of data and relatively simple computing structure, to finish performance verification of the actual calculation of the design method. Secondly, adopting reconfigurable computing technology, the RISC soft processors, reconfigurable computing unit, the image input and output control module, memory control module are integrated in FPGA, achieving a tight coupling structure of RISC soft processors and reconfigurable calculation unit, and based on this structure to achieve a, connected components analysis. The introduction of RISC soft processors is to solve control flow which is difficult for pure hardware implementation in, the final experimental results show that the design method is correct. Finally, the mirrored cache mechanism based on adaptive re-configuration is proposed to meet the potential future of image processing applications demand high-speed upgrade capability.Actual test results show that, image processing system is designed based on single FPGA chip, using multi-level pipelining, reconfigurable computing technology and the rapid re-configuration technology, can meet different image processing algorithms to ensure high-speed computing needs and a good system upgrade capability; while single-chip design reduces size and the development effort.So, this paper provide a doable design method for application.