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Implementation Of I2S Protocol Interface And UVM-based Verification

Posted on:2021-06-09Degree:MasterType:Thesis
Country:ChinaCandidate:Y M LiFull Text:PDF
GTID:2518306047986079Subject:Master of Engineering
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With the continuous development of integrated circuit technology,more and more design research based on system on chip(SoC)is continuing.Generally,many interface modules are integrated on the SoC chip to perform their respective functions,and audio interface modules are also widely used.Audio technology is an important part of multimedia technology.In digital audio transmission technology,various countries are continuously implementing transmission protocol standards.The I2 S protocol standard has the advantages of simple structure,good stability,and wide range of applications.Based on the AMBA3.0 APB bus protocol,this article has designed an I2 S protocol interface peripheral module that can support I2 S standard,left-justified standard(MSB),right-justified standard(LSB)and PCM standard audio transmission.At the same time,it has a programmable clock generator,which can not only control and adjust the audio sampling frequency,but also provide clock output for other modules.In addition,it also has DMA function and interrupt function to improve the working efficiency of the system and save energy consumption.The original design is divided into 8 sub-modules according to the functional requirements by verilog language to realize the function of the I2 S protocol interface module.In addition,the verification of the module has been completed.With the development of integrated circuits,the importance of verification is increasing.In many digital IC projects,the workload required for verification is often more than double the design.Higher efficiency,stronger functionality,and more comprehensive coverage are the constant pursuit of verification.With the update of multi-generation verification methodologies,UVM universal verification methodologies have been favored and promoted by the majority of verification personnel.This article uses the most advanced verification method UVM,based on System Verilog language,to design and build a verification environment for functional verification of the I2 S protocol interface module.The APB verification IP encapsulated in the verification environment can be reused for any module based on the AMBA3.0 APB bus protocol to provide APB interface transmission.In the form of assertion check,the real-time detailed check is performed on the output port of the I2 S protocol interface module.Based on the function points to be tested extracted in the early stage of verification,multiple test cases are constructed to perform functional verification of the I2 S protocol interface module.Use EDA tools such as VCS and DVE to conduct simulation experiments and analyze the implementation of the inspection result acceptance function in simulation waveforms and test cases.In the end,the completeness of the verification was judged by the code coverage and function coverage,and the results obtained were 100%.It can be proved that the design of the I2 S protocol interface module fulfills the project functional requirements and has been fully and fully verified.The I2 S protocol interface module designed in this article supports multiple audio transmission standards and data formats,can be flexibly configured,and can be configured as a master or slave device for transmission,meeting a variety of audio transmission use scenarios,and can be reused in other uses AMBA bus SoC system as an audio interface.The verification environment built in this article can be reused for system-level verification after a small modification.The designed APB verification IP can also be widely reused,which proves the strong inheritability of UVM and greatly improves the efficiency of verification work.The development of the chip provides effective support.
Keywords/Search Tags:I2S, Audio Interface, UVM, APB Bus, Verification IP
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