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Channel Estimation And LDPC Decoding Of NAND Flash Memory System

Posted on:2021-03-26Degree:MasterType:Thesis
Country:ChinaCandidate:W H SunFull Text:PDF
GTID:2518306047984489Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
As the developing of NAND flash memory manufacturing,the density of data capacity is in-creasing,and the cost is decreasing.More and more devices are using NAND flash memory to store data.But the NAND flash memory technology also has some challenges.However,As the most harmful noise,retention noise has more impact on NAND flash memory with advanced manufacturing procedure.Thus,how to recover information from the data cor-rupted by retention noise is a challenging problem.From the aspect of channel estimation and channel decoding,we designed some retention error recovery schemes to increase the reliability and lifetime of NAND flash memory.First,the fundamental of reading and programming in NAND flash memory was introduced.After that,by introducing noises in NAND flash memory,a channel model of NAND flash memory was constructed.Then the simulation of the effect caused by retention noise was shown.Also,the reference voltage design method,LDPC SPA decoder and the NAND flash memory estimation method based on the result of LDPC decoder were introduced.By analyzing the NAND flash memory channel and applying the density estimation,a two-stage estimation of NAND flash memory was proposed.The first stage is to give an initial choice of the test state and two corresponding read sensing reference voltages by which a three-region voltage partition of this state is determined to get the ratios of samples located in these regions.Then,a rough estimation of mean and variance is acquired by solving equations.Utilizing the relation between states,parameters of other states can be acquired immediately.In the second stage,by employing the estimation result of the first stage,a new test state is chosen,and new reference voltages are calculated.Then,the refined es-timation result can be acquired by the procedure same with the first stage.The numerical result shows that the proposed two-stage channel estimation method can estimate channel parameters accurately and extend retention time effectively.The joint processing of channel estimation,detection and low-density parity-check(LDPC)decoding is an effective method to handle the recovery of retention error.To reduce the complexity of conventional methods,a discrete retention error recovery scheme is proposed.In the proposed method,all the data involving in calculation and data transfer are integers,from which complex float point calculation is avoided.The proposed method consists of two major components referred to as binary tree searching(BTS)based channel updating and information bottleneck(IB)based LDPC decoding.In channel updating,the proposed learning-based BTS algorithm can acquire reference voltages directly and thus bypass the intermediate stage of retention noise parameter estimation.The LDPC decoder is realized by IB based message passing,where node operation is achieved by lookup tables and the messages passed between nodes are integers.Besides,a dynamic quantization level reduc-tion strategy for IB based decoding is proposed to reduce the memory consumption of lookup tables.Finally,using PEG-constructed regular LDPC code(8000,7200),the numerical re-sults show that the proposed discrete method has much lower computational complexity and similar performance compared with the conventional method.
Keywords/Search Tags:NAND flash memory, Channel estimation, LDPC decoder, information bottleneck
PDF Full Text Request
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