Research On High Density Flash Channel Detection Algorithm And Design Of ECC Verification Platform

In the age of big data and cloud services,the rapid growth of mass information poses new challenges to data storage.Multi-level flash(MLC)storage technology utilizes charges of different potentials to greatly enhance the storage capacity.However,with the flash storage density increases,some new interference and noise are introduced and reduce storage reliability and lifetime.Advanced signal processing technology and error correction coding technology have become the main way to further improve the reliability of flash memory storage and become a hot research topic.Adopting advanced signal processing technology in high-density flash channel can effectively eliminate the interference to the threshold voltage.However,the existing channel detection and noise cancellation algorithms have difficulty in obtaining accurate programming voltages and increasing the read latency,thus affecting the overall performance of storage system.In addition,LDPC code has been gradually applied to high-density flash memory devices due to its excellent error correction performance.However,existing Verilog-based verification platform can't efficiently perform functional verification of all the test points when the encoder and decoder is verified.This paper based on high-density NAND flash channel signal processing,mainly carraying out research on channel detection algorithm and verifying the LDPC encoder and decoder.The main research contents and results are as follows :(1)The design and construction algorithm of LDPC code and the belief progagation decoding algorithm are deeply studied and analyzed.On this basic,the decoding performance of LDPC code over AWGN channel is verified by simmulation.(2)Analysing for the high-denisity NAND flash channel model and the neighbor cell interfenence(CCI)mechanism,according to the statistical characteristics of interference statistics,a low-latency channel detection algorithm is proposed.This algorithm can effectively eliminate threshold voltage offset caused by CCI,which can greatly improve channel detection performance.(3)In order to overcome the problem that it is difficult to obtain the accurate programming voltage of neighbor cell in channel detection.Two improved channel detection algorithm are proposed based on the a-priori information of neighbor cells and the a-posterior information of neighbor cells after decoding.The new proposed algorithm can greatly reduce the complexity of the interference cancellation algorithm while guaranteeing excellent channel detection performance,thus obtaining the low-latency channel detection performance.(4)The verification platform of LDPC encoder and decoder module is built based on VMM.Through verification and analysis of the LDPC code modules in Sata3.1 flash controller,the results show that the verification platform can efficiently and conveniently to realize the function point comprehensive verification of the encoder and decoder,and providing support for parameter optimization of the LDPC encoder and decoder module.