| This thesis reports the results of a design and implementation of a mixed analog/digital baseband data demodulator for narrow-band digital FM radio receiver. It also documents work done on the system level demodulator optimization, a simulation environment created to facilitate such an optimization as well as the design of a library of CMOS standard cells and adopted IC design methodology.;The design has been verified at the system level by means of behavioural modelling with its parameters optimized to achieve satisfactory bit-error-rate (BER).;A set of digital and some analog standard cells was created, verified by simulation, and characterized after fabrication in 3-micron double metal CMOS process.;Originally there were two chips implemented: one containing the analog blocks and the other the digital portions. This would allow functionality of the building blocks to be verified. The fabricated chips were tested to be fully functional and closely agreed with simulated results. Finally the analog/digital baseband data demodulator was implemented onto a single chip. The chip area was approximately 4.0 mm x 1.1 mm. (Abstract shortened by UMI.). |
