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Research And Design Of A Wideband Analog Baseband Circuit Based On 65nm CMOS Technology

Posted on:2019-11-21Degree:MasterType:Thesis
Country:ChinaCandidate:J YangFull Text:PDF
GTID:2428330548480145Subject:Engineering
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This paper presents an analog baseband for a new generation mobile communication receiver system.The analog baseband includes programmable gain amplifier(PGA),channel selection low-pass filter(LPF)and DC offset cancellation circuit(DCOC).It can realize the function of gain adjustment,frequency selection,DC offset suppression and so on.The PGA is based on parallel negative feedback super source follower.A larger bandwidth can be obtained at lower power consumption due to the open loop structure.Precise gain adjustment can be achieved by using programmable source degenerate resistance and load resistance,controlled by a digital serial peripheral interface.Besides,a series of linearity optimization techniques are introduced in the PGA.The DCOC is based on a continuous time negative feedback structure which concludes a low-pass filter,a trans-conductance unit and correction resistances.The low pass filter is realized by the first order passive RC structure,and large capacitance is achieved by using Miller effect to save the chip area.The trans-conductance unit is realized by a four channel current mirror to improve transconductance and stabilize the common-mode voltage.The LPF is based on six-order Chebyshev Active-RC structure and is synthesized by three cascaded Sallen-Key biquadratic cells.The cut-off frequency of the filter is 100/130/170 MHz adjustable to cover the application requirements of multi-mode and multi-band.The operational amplifier is based on an improved two stage amplifier with Miller compensation.It can reach a large gain bandwidth at a moderate power consumption,so as to reduce the influence of non-ideal factors on the filter effectively.The design is completed by using TSMC 65nm CMOS technology and the chip occupies 0.114 mm2 active area.The post simulation results show that the power consumption of the chip is less than 25mW with a 1V supply.The bandwidth is tunable between 100 MHz,130 MHz and 170MHz.The analog baseband also demonstrates 1dB gain step tuning ranging from OdB to 60dB with a step error less thaną0.14dB.The noise figure is 26dB and the input IIP3 is-47.5dBm at the maximum gain.According to the results,the whole performance of the analog baseband has met the requirements for a broadband wireless receiver system.
Keywords/Search Tags:broadband wireless communication, analog baseband, channel selection filter, programmable gain amplifier, DC offset cancellation
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