Research And Design Of CMOS Rf Transmitter Analog Baseband

Driven by wireless communication applications such as Internet of Everything(Io E)and Industry 4.0,radio frequency(RF)transmitter,as a carrier of wireless communication,is supposed to achieve high data transmission rate and low bit error rate while maintaining small chip area and low power consumption,posing higher requirements and challenges for the research and design of RF transmitter.RF transmitter is composed of the analog baseband part and the RF part.The analog baseband part mainly includes the digital-to-analog converter(DAC)and the low-pass filter(LPF).It is responsible for converting the parallel signal from digital baseband into a high-quality low-frequency analog signal.The control circuit based on serial peripheral interface(SPI)can adjust the working status of each module in RF transmitter,which improves the stability and power efficiency of the transmitter.Thus,the dissertation proposes a high-linearity and low-power CMOS RF transmitter analog baseband and its control circuit that supports the IEEE 802.11 b/g/n protocol.The dissertation first introduces the architecture and principle of RF transmitter and its analog baseband.Then,the components of the analog baseband,including the DAC,active LPF and control circuit,are introduced and analyzed in detail.Their working principle,main architecture and specifications are mentioned.Under the design requirements of low power consumption and high linearity,the dissertation proposes some improvements and innovations,including the low-voltage low-power design and optimization of current-steering unit based on error elimination,a latch and switch driving circuit without feedthrough difference,a new DAC output architecture based on transimpedance amplifier(TIA),and a new layout segmentation method of DAC current-steering array with low output jitter.Then,the circuit design and simulation verification are introduced.At last,the layout design,post-simulation results and performance comparison of the proposed analog baseband and its control circuit are introduced.Based on 40 nm CMOS,the dissertation implements a high-linearity low-power RF transmitter analog baseband and its control circuit that supports the IEEE 802.11 b/g/n protocol.The total power consumption is less than 4 m W,and the die area is only 0.1 mm².At 160 MS/s sampling rate,the signal bandwidth is 0.15 MHz?8.75 MHz,and the signal bit width is 10bits.Post-simulation results show that the spurious-free dynamic range(SFDR)of DAC is better than 70 d Bc,the signal-to-noise ratio(SNR)is better than 60 d B and the total harmonic distortion(THD)is less than-69d B.The core power consumption of DAC is only 0.43 m W.The active LPF has a cutoff frequency of 12 MHz,and the closed-loop gain is 0?20 d B.The LPF achieves a SFDR better than 65 d Bc,and the THD is less than-65 d B.The power consumption of LPF is only 2.17 m W.When the output swing is400m V_pp,the SFDR and SNR of analog baseband are 65.35 d Bc and 62.41d B,respectively.The control circuit can set the status of each module and adjust the module performance as needed to achieve high power efficiency.