Performance-driven FPGA synthesis for sequential circuits

Since the capacity of FPGA devices grows quickly from several thousand logic gates to over one million, design automation is crucial to FPGA designs. This dissertation considers one important aspect of look-up table (LUT) based FPGA designs: performance-driven FPGA synthesis for sequential circuits . Our work includes the following three major parts.; 1. Performance-optimal FPGA synthesis with retiming. We propose three algorithms, named TurboMap, TurboMap-frt and TurboSYN, for FPGA mapping of sequential circuits with or without given initial states, and FPGA synthesis with automatic pipeline insertion. Our tests show that we can achieve (1) 14--20% reduction on clock period vs. separate mapping with retiming and, (2) 41% reduction on clock period vs. separate FPGA synthesis with retiming and pipelining, when Boolean optimization is considered.; 2. Performance-driven circuit clustering with retiming. We propose a new and highly efficient quasi-optimal algorithm which can reduce both the time and space complexities by one order of magnitude over the previous quasi-optimal clustering with retiming algorithm, while guaranteeing the same clock period in the solutions. When compared with the latest performance-driven clustering algorithm designed specifically for FPGAs, our algorithm can reduce the clock period by 40% on average.; 3. Fase FPGA mapping for area/delay estimation. We propose a set of highly efficient cut enumeration, ranking and pruning techniques to enable very general and fast FPGA mapping algorithms. Those algorithms can be used on a new design flow with highly coupled synthesis and layout design. For area minimization, we propose a new algorithm based on our cut enumeration techniques which can consistently outperform all existing area-oriented FPGA synthesis algorithms published in literature in terms of both runtime and solution quality. Our algorithm can also compute a lower-bound on the minimum area which is only at most 15% smaller than the minimum area based on our experiments, although to compute the exact minimum area is NP-complete.