| Along with the growth of signal processing capabilities, sequence detection of digital signals transmitted over noisy channels has become the preferred choice in many applications. Consequently, researchers accelerated their efforts toward addressing the implementation issues of such detectors. Naturally, almost all of the solutions were developed in a digital realization environment, mainly because digital signal processing has been shown to be powerful and flexible. At the same time, the idea of analog implementations of sequence detectors was introduced by a small dedicated minority in the hope of finding areas where digital solutions fail to fulfill some of the system requirements. This hope became a reality when analog Viterbi decoders outperformed their digital counterparts in the exceptionally demanding saturated magnetic storage application. The challenge was to realize the Viterbi algorithm such that the ever increasing requirements of small size, low power, and high speed are satisfied.;Described in this thesis, is another attempt for realizing the Viterbi algorithm in the analog domain. Partial-response sequence detectors with application to magnetic recording and data transmission over cables are of special interest, however, other subjects are also addressed. Although the essence of an analog realization is to eliminate the power-hungry analog-to-digital converter, here it is shown that additional savings may also be accomplished if the algorithm is carefully examined from an analog implementation perspective. In particular, in this thesis, an analog architecture for realizing a class-IV partial-response Viterbi decoder is introduced, integrated circuit implementation of this decoder is described, and experimental results are presented. The operating speed and savings in the silicon and power consumption are well beyond the reach of any reported digital decoder, even in more advanced technologies in many cases. Furthermore, and supported by experiments, it is shown that more complicated signaling schemes can also benefit from an analog implementation. The idea was to alleviate the transistor-level obstacles and encourage analog designers to explore new territories for analog sequence detectors. Finally, some implementation issues of reduced-state sequence decoders are addressed and analog solutions are introduced. |
