Valence-band electron tunneling in deep-submicron metal oxide semiconductor field-effect transistors

Scaling of the gate dielectric thickness in MOS transistors is used to increase their drive current, and results in an exponential increase in the gate current due to the direct tunneling (DT) of electrons and holes from the gate and substrate regions. Recently, it has been reported that the gate dielectric thickness could be scaled down to 0.7 nm in future generations of MOSFETs which will require an accurate estimation of the tunneling current to incorporate the effects of tunneling on device performance. The contribution of each tunneling mechanism needs to be included while estimating the effects the gate dielectric thickness scaling on the tunneling current. Valence-band electron tunneling (VBET) forms an increasingly significant part of the gate current in ultrathin gate dielectric MOSFETs. This thesis develops a physical model for valence-band electron tunneling in MOSFETs with the gate dielectric thickness ranging from 3.5 down to 1.5 nm. Next, this thesis introduces a new parameter extraction methodology for the determination of the gate dielectric thickness in N- and P-channel MOSFETs from the characterization and modeling of valence-band electron tunneling current. The advantages of such a technique over other conventional techniques are discussed. The tunneling current in MOSFETs depends on the composition of the gate dielectric and gate electrode material. Next, this thesis reports the effect of Ge content in poly- Si1-xGex gate material on the tunneling current in MOSFETs with ultrathin gate dielectrics. Efforts are being made to reduce the tunneling current in MOSFETs by replacing SiO2 by alternate gate dielectrics with higher dielectric constant. Finally, this thesis develops models to study the effect of such composite gate dielectric structures on the tunneling current in MOSFETs.