A distributed arithmetic-based CORDIC algorithm and its use in the FPGA implementation of the 2-D IDCT | Posted on:2003-11-21 | Degree:M.A.Sc | Type:Thesis | University:Concordia University (Canada) | Candidate:Yang, Yi | Full Text:PDF | GTID:2468390011977788 | Subject:Engineering | Abstract/Summary: | | The discrete cosine transform (DCT) based image compression techniques play an important role in today's digital applications. A video codec chip requires an integration of high-speed DCT and inverse DCT (IDCT) hardware units in a limited silicon space.; This thesis presents a distributed arithmetic based CORDIC algorithm for the computation of the 1-D IDCT and an FPGA implementation of a cost-effective architecture for a 2-D IDCT processor using the proposed algorithm. The processor consisting of two 1-D IDCT cores, a transpose memory and a control logic block performs the 2-D IDCT computation by using the row-column decomposition approach. The basis of the proposed scheme is a combined use of the distributed arithmetic and the CORDIC algorithm in order to provide a small access time to the lookup tables and a reduced complexity for its architecture. In the proposed design, the deep pipeline structure of an existing CORDIC based architecture is replaced by much smaller DA-based ROM accumulators.; In the proposed design, a bit-level digit-serial structure based on the redundant number system using an on-line algorithm is employed. (Abstract shortened by UMI.)... | Keywords/Search Tags: | CORDIC algorithm, DCT, 2-D, Distributed | | Related items |
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