Adaptive analog receiver equalizer for Gbps data communications

As the data rate of digital transmission advances over Gbps, frequency dependent attenuation results in severe intersymbol interference in the received signal and makes it mandatory to use equalizer in data transceiver to recover data correctly.; Two analog adaptive receiver equalizers for 1 Gbps and 2.5 Gbps digital data transmission over printed circuit board are proposed in the thesis. The equalizers use a new analog adaptive equalizer structure, whose transfer functions are adapted by comparing the spectral information of the sliced equalized signal to a reference random sequence. Analog realization makes it able to adaptively equalize received data before clock information is recovered, which avoid clock recovery loop interacting with data adaptation loop. To take the advantage of the sliced equalized signal, a new method to extract the error information, called pulse extractor, is used to extract the spectral information from both the equalized signal and the reference signal. Compared with the traditional bandpass filter followed by rectifier implementation, this method has wider input signal range and is scalable to higher speed technologies beyond GHz range, in addition to largely reduced power dissipation and die area. 3D error space analysis is used to investigate the optimal central frequency of pulse extractor to help the convergence of adaptive algorithm, which use random weight change algorithm and sequence perturbation algorithm.; Two prototype chips of above adaptive equalizers using continuous-time fractionally-spaced FIR filters as equalization filter implemented with CMOS 0.25-mum mixed-signal process have been fabricated and tested. Digital implementation of random weight change algorithm and sequence perturbation algorithm using error signal generated by pulse extractor has successfully adapt the transfer function of the equalizers when the PCB trace varies from 20-inch to 120-inch for 1 Gbps equalizer and from 20-inch to 120inch for 2.5 Gbps equalizer respectively. Over 75% horizontal eye opening is achieved in the whole tuning range. These are the fastest reported CMOS adaptive equalizers using fractionally-spaced FIR filters with close-loop control.