Research And Implementation Of A/D Subsystem On The Hardware Platform Of The GBPS Wireless Communication System

With the development of mobile communication technology and growth of subsc ribers'demand, China launched pre-research on key technologies of fourth-generation mobile communication system, "National 863 Hi-Tech Program Project:Research and Development of Gbps Transmission Key Techniques and Demo Systems". The goal of such a project is to reach transmission rate of 1 Gbps with 100 MHz bandwidth. Considering that gap between the goal and current processing ability of baseband hardware, new solutions are needed when designing Analog-to-Digital subsystem(A/D subsystem).In this thesis, hardware design process of A/D subsystem is discussed, which is a part of baseband processing unit in the Gbps experimental system. The main contributions are as follows:1. Facing challenges on high bandwidth, high transmission rate, high precision, multi-channels and design requirements of mixed signal circuits, this thesis firstly illustrates a general design solution for the A/D subsystem, in which A/D converter acts as the core instrument.2. According to relevant theories about A/D converter, factors that influence A/D converter's main performance characteristics, including Signal-Noise-Ratio and Stray-Free Dynamic Range are analyzed.3. Based on the proposed general design solution, selection of main instruments is accomplished, as well as theoretical performance analysis, which testifies the rationality of our selection.4. With selected instruments, a detailed design solution is proposed in this thesis.5. Explicit hardware designs are presented, as well as integrity simulations for key signals, which can be referred to in subsystem's design process, and hardware tests which are used to validate subsystem's performance.