Applied To 3.2 Gbps Sata Again Drive Circuit Of The Research And Implementation

High speed serial interface technology, SATA (Serial ATA), provides broader bandwidth for the data transmission between chip, enabling high speed data transmission. However the frequency dependent loss of transmission media will cause ISI, which affects the quality of the transmission data and BER, thus limiting the data rate and the transmission length. Equalization and broadband technology are two major technology employed in high speed signal system. The main function of equalization is to compensate or reduce the impact of the loss of the transmission line on BER. As to unfixed length of transmission channel, adaptive equalization can offer better solution. Bandwidth remains the main bottleneck in the design of the high speed signal system, and Bandwidth technology is also the main concern in the process of design.This thesis focuses on the research and implementation of the Redriver circuit applied in 3.2Gbps SATA. The main blocks of the Redriver circuit is Equalizer and Limiter. Equalizer adapts the Capacitive Degeneration structure. It functions as a high pass filter which will compensate the high frequency loss. On the basis of the comparison and research of different broadband structures, Limiter adapts Cherry-Hopper structure. The circuit is used to amplify the small swing high frequency signal. During the design of Limiter, tradeoff must be taken into account between gain, noise and bandwidth. SATA Redriver includes controllable equalizer, DC cancelling, Limiter, preamplifer and CML. The thesis has covered the process from circuits design to layout design and the chip has been fabricated in Hynix 0.25um, single poly, four mental CMOS technology.It’s the trend that equalizer can compensate the input data depending on different length of transmission line that the signal passes through. Further research has been taken to propose novel two loop structure for adaptive equalizer. This novel structure is supposed to fix equalization accuracy problem which often occurs in conventional adaptive equalizer structure. This adaptive structure has been implemented from circuit design to layout design.For reality application, the SATA Redriver proposed in this thesis employs the broadband technology and equalization structure to meet the spec which has been confirmed in the test results. As to originality, this thesis proposes a two-loop adaptiveequalizer to solve the equalization accuracy problem, which proves effective from thesimulation.