| Energy consumption of computing systems has grown to be of crucial importance. The increased integration achieved by modern processes has led to an increase in the functional complexity of computing applications. The current industry trend in computing demonstrates the demand for increased performance and low-power/energy consumption. This puts a severe strain on the battery life for portable computing applications. Hence what is needed is a low-power, high-throughput design methodology that extends battery life without compromising the performance of a portable computing application.; In this thesis, a circuit-level scheme (Adaptive Voltage Scaling) is considered, which reduces the energy consumption of digital CMOS circuits by lowering the supply voltage of the application while achieving a desired level of system performance.; In Adaptive Voltage Scaling, a single supply voltage is dynamically adjusted to the minimum possible value for a given performance requirement while ensuring correct operation of the application at all times.; In this thesis, a design methodology for the above scheme is described. The proposed scheme is simple to implement, synthesizable by modern CAD tools and has low area and power overhead. Prototype ICs utilizing the proposed design methodology for AVS demonstrate the validity of the approach and energy/power savings compared to a fixed supply voltage scheme. |
