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Design of embedded NIOS II processor based system for implementing bridging algorithm of profiling application

Posted on:2013-04-24Degree:M.SType:Thesis
University:The University of Texas at ArlingtonCandidate:Ashi, Vinay SFull Text:PDF
GTID:2458390008466709Subject:Engineering
Abstract/Summary:
The Texas Department of Transportation (TxDOT) uses multiple instruments for quality assurance of new and existing pavements. These instruments measure the different characteristics of the pavement such as the longitudinal profile, transverse profile, texture, rutting, etc. to determine the smoothness and ride quality of the pavement. These instruments mainly consist of different sensors such as lasers, accelerometers, distance encoders, etc., to calculate the ride quality. Various ride statistics such as International Roughness Index (IRI), Mean Profile Depth (MPD), and Present Serviceability Index (PSI) are then calculated and used to monitor the conditions of the roads.;The Roline laser system is used to calculate the road profile. The profiling module is configured and controlled by a program running on a windows operating system. A certified profiling system with the wide line laser is now being successfully used on roads. Also, a dual laser profiling system, which can collect data from two profiling modules simultaneously, is being used.;The objective of this thesis is to investigate and develop an embedded NIOS II processor based system on Cyclone IV FPGA (DE2-115 development board) from Altera Corp for implementing a bridging algorithm. This algorithm is used to preprocess the free mode data from Roline line laser and compute the bridge values which will be used in profile computation. For computing bridge values, processing steps include data qualification, tilt compensation and averaging. A memory interface has to be designed for this NIOS II processor based system, so that Roline laser data to be used for bridge mode data calculation and computed bridge mode values can be saved to a flash memory. Memory system design consists of a combination of components such as on-chip memory, DMA controller, SDRAM and SD card Interface. FPGA resource usage is also monitored for the system design.
Keywords/Search Tags:II processor based system, NIOS II, Profiling, Algorithm, Memory
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