MP3 Decoding Research And Implementation Based On Nios Ⅱ

This paper first introduces the architecture and the features of the Nios II processor and then explains the structure of Avalon bus model and the method to solve the bottleneck of the bus transfer. Then, it makes an in-depth analysis of the overall process and algorithms of the MP3 decoding in detail. On this basis, this paper takes Nios II soft-core processor as the controlling center with SOPC technology, builds the processor hardware system by the SOPC Builder development tools and makes use of FPGA development board peripherals to realize MP3 decoding. In software, improves the main modules of the MP3 decoding to run faster and establishes the file system to read files conveniently. In hardware, the system reads MP3 audio files from the CF card, and then decodes MP3 through the decoder, outputs PCM, and finally gets analog audio signals through the digital-analog converter. Experimental results show that the analog audio signals consistent with the PCM value. This paper realizes the MP3 decoding based on Nios II, as computing nodes in NoC constructed by FPGA.