Development Of Dual-core Processor System Based On Nios Ⅱ

SOPC (System on Programmable Chip) is reconfigurable system on programmable device. As a combination of SoC (System on Chip) and FPGA (Field Programmable Gate Array), SOPC utilizes soft-core processor to facilitate the specific applications design which implements on FPGA to fulfill system developing. Benefiting from low risk and reconfigurability in system developing, as well as application flexibility and price advantage, SOPC has earned reputation as"the future of the semiconductor industry".This paper embodies the reconfigurability, user-oriented and application-oriented SOPC design ideas within entire Nios II processor system developing. Based upon studies on the structure of Nios II soft-core processor and Avalon bus specification, this paper constructs a uni-core Nios II processor system, implements the design on FPGA , and verifies the validity and practicability of uni-core system by executing a computing-intensive JPEG decoding task. A dual-core Nios II processor system design is proposed based on uni-core system, and the dual-core system achieves parallel processing for JPEG decoding on FPGA successfully. In this paper, YUV to RGB conversion custom function module is developed and integrated into Nios II processor system, by which to fulfill hardware acceleration for floating-point and multiplication calculation, thereby to improve the system's overall performance.This research tries to optimized system power consumption and performance. Employing logic mapping reconfiguration and memory optimization and memory balancing, the power consumption of dual-core Nios II processor system is reduced by 55mW, as much as 7.03% of overall power. Benefiting from the integration of YUV to RGB conversion module which reduces computing overhead of processor and increases degree of parallelism, the system performance is improved about 17% and 15% for uni-core and dual-core system respectively。This paper, utilizing Nios II applications developing platforms and FPGA developing board, accelerates the speed of SOPC system design and verification. Therefore, for embedded systems and especially the multi-processor system developing, this paper has a wide range of values and positive significance.