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Modeling and design of lab-on-a-chip systems

Posted on:2008-11-01Degree:Ph.DType:Thesis
University:Carnegie Mellon UniversityCandidate:He, XiangFull Text:PDF
GTID:2458390005480027Subject:Engineering
Abstract/Summary:
A Lab-on-a-Chip (LoC) is essentially a miniaturized analytical chemistry laboratory that is constructed in a microchip structure. LoC devices that are fast, accurate, automatable and inexpensive to fabricate have been used increasingly in the life-science and biomedical industries for applications in genomics, drug discovery, point-of-care analysis and in-vivo diagnostics. LoC systems generally include micro unit operations such as mixing, reaction, injection, and separation. In this thesis, we present our work on the modeling and design of LoC systems.; LoC design combines complex physiochemical phenomena with challenging chip layout and channel inter-connectivity issues. The chemistry that takes place during chip operation, as well as the chip layout and manufacturing process must be understood so that the appropriate design trade-offs and constraints are considered. Channel geometry, has been shown to contribute a great deal to the overall performance of the final LoC design [1]. These issues result in a design problem that is highly nonlinear and highly combinatorial.; Currently, there are three common approaches employed for the LoC design: laboratory experiments [2], analytical solution of the governing partial differential equations [3], and numerical simulations [4] as well as combinations of the above techniques [1]. While these approaches are excellent for design verification, they are inefficient for design optimization. Here we develop the methodology necessary to reduce the LoC design cycle from months to only minutes.; This thesis covers four major topics: (1) Conceptually decompose the whole system into subsystems: mixing, reaction, injection, and separation. Thus, the overall LoC performances can be evaluated by the behavior of individual components, as well as the interplay between integrated components. (2) Develop parametrized component models for subsystems. Each model is sufficiently accurate to capture the subsystem behavior, including the effects of operational parameters and channel geometries. These models are also computationally efficient for large number of iterative studies. (3) Build a system-level simulator that combines an electrical circuit simulation [5] and chemical process simulation [6] with the accurate and fast component models. (4) Formulate the simulation-based optimization framework for problem solving. This framework automatically evaluate and update proposed design by numerical optimization.; We demonstrate our methodology by automatically designing LoC capillary electrophoresis subsystems. We address the design optimization that takes into consideration of both the chip performance and the channel geometry. We are able to identify the optimal channel geometry that minimize the chip size while maintain the performance. In addition, we compare our designs to experimental designs from the literature and demonstrate improvements. Finally, we propose directions for future research in this field.
Keywords/Search Tags:Chip, Loc
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