| The WaferBoard(TM) rapid prototyping platform for electronic systems is proposed as a tool to help meet today's tight delivery time, performance and reliability constraints. At the core of WaferBoard(TM) is the WaferIC(TM), a wafer-scale reconfigurable CMOS circuit. At the surface of this complex circuit is a sea of identical contacts, any pair of which can be interconnected through a mesh grid network called WaferNet(TM). The user can simply deposit packaged integrated circuits on the smart active surface, and then a complex interconnect pattern between these ICs can be established in a matter of minutes. As is the case with development of any novel technology, design of the platform poses several technical challenges. Some of the postprocessing and integration tasks to be accomplished on the CMOS wafer are laid out hereafter. Firstly TSV etching was studied in depth and optimized to obtain vias of aspect ratio up to 15:1. Then the processing of a 0.18mum CMOS TestChip fabricated to validate the WaferIC(TM) concept on a 1/100th scale is outlined. Topside processing is then investigated with the characterization of Anisotropic Conductive Films leading to the choice of an ultra-high fiber density Z-Axis film attached in a novel unbonded manner. |
