| With technology advancement (90 nm, 65 nm, 35 nm and even smaller), systems became more subjected to higher manufacturing defects and higher susceptibility to soft errors due to the exponential decrease in device feature size. Currently, soft errors induced by ion particles are no longer limited to specific field such as aerospace applications. This rises the challenge to come up with techniques to tackle transient or soft faults effects in both combinational and sequential circuits in general. This work is directed to analyze, model and design sequential circuits at the design level, namely finite state machine (FSM), to increase its tolerance to radiation induced transient faults. A technique based on adding redundant equivalent states to protect few states with high probability of occurrence is proposed. The added states guarantee that all single bit faults occurring in the state variables or in their combinational logic of highly occurring states are tolerated. The proposed technique has minimal area overhead because only few number of states are chosen for protection. In addition, state assignment is explored and found to have a minimal impact on soft error tolerance of sequential circuits. Hence, an- other technique is proposed to enhance reliability to a sequential circuit that has a specific state assignment optimizing a certain criteria such as area. Experimental results on ISCAS89 sequential benchmark circuits show that failure rate reduction of 62% up to 83% is achieved compared to the original circuits. The number of highly probable protected states are 9% up to 40% of the total number of states that yield 25% up to 90% state probability coverage. The area cost is found to be about 1.80 up to 4 times the original circuits area. Moreover, starting from a state assignment which optimizes a sequential circuit in terms of area, similar failure rate reduction is achieved and the resulting area overhead is kept minimal.;Keywords: fault tolerance, soft errors, transient faults, single event upset (SEU), single event transients (SET), nano technology, robust system design, circuit reliability, sequential circuits, soft error rate, triple modular redundancy.. |
