ASIC Chip Design For ATC Secondary Surveillance Radar

In order to adapt to the increasing demands of air traffic control tasks all around the world,and make a real breakthrough of technology on the air traffic monitoring and management,the application of the emerging mode-S ADS-B technology in air traffic control(ATC)system has become an urgent requirement in the current ATC field.ADS-B adopts independent automatic broadcasting monitoring technology with high precision,low cost,good safety and high efficiency and other features,which has been adopted by multinational civil aviation organizations.Therefore,the research on ADS-B based ATC radar system is of great significance to the progress of ATC technology and the development of civil aviation in China,as well as to break our country's dependence on the import of specific radar chips from foreign countries.In this paper,the ASIC chip for ATC secondary surveillance radar(SSR)has been designed for the transponder part of the SSR system on the ground.This paper focuses on the prototype verification of the function of ADS-B signal processing channel in ASIC chip on FPGA platform,and completed the whole process of semi-customized ASIC design based on standard unit after the prototype verification.The signal transmitting and receiving function of ADS-B receiver is realized by ASIC chip.Compared with IC for general purpose,ADS-B receiver takes the advantages of lower power dissipation,smaller volume,higher reliability and security grade,stronger performance and significantly lower cost in mass production.For the main purpose of this project,the following work has been completed respectively:1.Based on the development history and current situation of air traffic control at home and abroad,this paper discusses the current working system of advanced secondary surveillance radar and the technical methods of ATC monitoring,and analyzes the specific application scenarios of the ASIC chip for ATC-SSR,as well as the feasibility and necessity of the research.2.Function prototype verification of ASIC chip was completed on FPGA platform.We selected the development board of the model XC7Z010-1CLG400 C in the ZYNQ-7000 series,combined with the data acquisition card with the core of AD7606 chip,respectively completed the main functions of ADS-B receiver including the A/D sampling,digital demodulation system design including digital mixing,low-pass filtering,NCO function such as the vibration signal,the parameter configuration using the technology based on the algorithm of serial to parallel completed by UART to SPI module,using CRC and violence error correction algorithm to realize the data check and correction.3.The design process of the ASIC chip.Mainly by using the IC design suite developed by Synopsys Inc,on the development environment of RedHat enterprise Linux operation system,completed the front-end design mainly on RTL design and synthesis,pre-simulation and timing analysis,the back-end design mainly on the layout of the place-and-route and post-simulation,generating layout of GDS format,produced the chip under 0.13 ?m technique and packaged with QFP technology,finally got the ASIC chip after production testing.