Research On Robustness Of SCR Devices Used For ESD Protection Under Advanced Technology

Electrostatic discharge(ESD)exists in daily life and industrial production,which can cause integrated circuit functional damage,metal melting,and gate oxide layer breakdown,causing serious damage to integrated circuit industrial production.There are many ways to generate ESD,such as friction,contact,and electromagnetic induction.The characteristics of ESD include high voltage,low power,and transient.ESD is extremely prone to ESD events during the production,packaging,transportation,and use of the semiconductor industry,which is an important cause of chip damage and functional failure.First,this article briefly introduces the research background,development trend,physical model,and test model of ESD,and introduces four basic devices commonly used in ESD protection,and briefly describes their ESD protection principles and robustness.In addition,according to the introduction of SCR protection devices,SCR devices have the highest robustness per unit area.Therefore,this article will use SCR devices as the research object to carry out research work to improve its robustness.The research work is divided into two parts: electrothermal simulation and experimental tests.The electrothermal simulation is to analyze the specific reasons and key parameters that affect the robustness of the SCR device through the mixed simulation of the electrical and thermal performance of the device.In this article,the commonly used LVTSCR(Low Voltage Triggered SCR)is subjected to electrothermal simulation verification.Through the extraction and analysis of the simulation diagrams of the electric field distribution,current distribution,and temperature distribution of its key operating points,the specific thermal failure of LVTSCR is found out.The location and influencing factors determine a method to effectively improve the robustness of the LVTSCR,that is,to increase the width of the parasitic bipolar transistor emission region in the LVTSCR.Based on the results of the electrothermal simulation,this paper carried out research work on experimental tests based on 55 nm and 28 nm CMOS process.Based on the 55 nm CMOS process,the two common SCR device structures,LVTSCR and MLSCR(improved lateral SCR)are taped out,tested,and the results are analyzed.It is concluded that the robustness of SCR devices is positively related to the current ratio of different current paths in the SCR device,and the device structure and key dimensions of the device have the effect of adjusting the SCR path ratio,and some conjectures about improving the robustness are proposed.In order to further verify the above conclusions and conjectures,in the 28 nm CMOS process,different SCR device structures are again taped out and tested through an optimized solution of key dimensions.In the 28 nm process tape-out results,the conclusions and conjectures of thermal simulation and 55 nm process are verified,and the robustness of SCR devices is effectively improved,up to 70 mA / ?m.Finally,the thermal simulation,the conclusion of the 55 nm process tapeout and the conclusion of the 28 nm process tapeout are comprehensively analyzed,and the conclusion that the robustness of the SCR device depends to a large extent on the size of the SCR path ratio can be passed.The ratio of the structure and critical dimensions of the device to the robustness yields a set of methods for adjusting the robustness of the SCR,which provides a reliable choice for SCR-type single devices in future ESD protection.