The increasingly fierce competitions in the electronic products market are leading to higher requirement for Touch-screen technology.As an essential key module of touch detection systems,the Analog-to-Digital Converter(ADC)is developing to the direction of high resolution,high conversion speed,low cost,low power consumption,and multi-channel processing.This thesis presents a medium-precision high-speed Successive Approximation Register(SAR)ADC for touch screen analog front-end.The system uses asynchronous clock control mode to increase the conversion rate.In order to improve the linearity of the system,a two-stage dynamic comparator combined with the proposed offset correction circuits is designed which could reduce noise,offset voltage and power consumption.The capacitor array uses the adaptive averaging technique to improve the Signal-Noise Dynamic Range(SNDR)and Spurious Free Dynamic Range(SFDR)while reducing the comparator noise requirements.In order to eliminate the mismatch of the capacitor,the thesis utilizes digital calibration.The mismatch errors are extracted from the Main-DAC,and then the digital correction is used to improve the Effective Number of Bits(ENOB)of the system.The chip is designed with SMIC 0.18?m Mixed Signal 1.8V/5V process.The sampling rate of 12bits SAR ADC proposed is 20MS/s.Simulation results show that when input 9.9MHz sinewave,the ENOB of the ADC is 11.63bits in the simulation of TT corner,27?,1.8V supply voltage.After extracting parasitic parameters in the layout,the ENOB is 11.15bits and SFDR is 81.41d B.The chip occupies 0.1916mm~2 and consumes 1.78mW. |