Research And Design Of Key Analog Circuits For Infrared Focal Plane Array Readout Circuits

Infrared imaging technology is widely used in modern life.As an important part of infrared focal plane array,the readout circuit has these development trends including miniaturization and high integration.Therefore,it is very important to research the high-performance readout circuit of infrared focal plane array(IRFPA).However,these performances of analog circuits in readout circuit directly determine the performance of readout circuit.Based on those,key analog circuits of readout circuit of IRFPA was researched and designed in this thesis.The main contents are as follows:Firstly,based on the analysis of the basic operating principle of readout circuit of IRFPA,this thesis discussed structure,operating mode and performance paramters of readout circuit.And,the operating sequence scheme of readout circuit is given.Secondly,based on the analysis of the basic principle of bandgap reference(BGR),two kinds of traditional BGR circuits were discussed.A high-order temperature-compensation BGR designed by adopting these techniques of piecewise linear temperature compensation in low temperature region and curvature temperature compensation in high temperature region.Simulation results showed that the designed high-order temperature-compensation BGR achieved the temperature coefficient of 1.602ppm/? when temperature changed from –40? to 125?.And the designed BGR achieved the power supply rejection(PSR)of –68d B at the frequency of 1k Hz.Thirdly,based on the analysis of the operating principle of the unit channel readout circuit,these circuits,which include the integrated amplifier circuit,the sample and hold circuit and the output buffer circuit,were designed.The folded cascode operational amplifier was used as the operational amplifier of these circuits including the integrated amplifier circuit and the sample and hold circuit.Based on the discussion of the switch structure and the error source,a bootstrapped sampling switch was designed.The input and output stages of the output buffer circuit are PMOS transistor input stage and common source class AB output stage respectively.Finally,based on these designed sub-circuits of readout circuit that included key analog circuits and logic control circuit,a whole readout circuit of IRFPA was designed in SMIC 0.18?m CMOS technology.Simulation results showed that the frame rate of the readout circuit could meet the requirement of 60 Hz.And,the readout circuit achieved the readout rate of 10 MHz and the output swing from 0.4V to 1.2V.