Study On Key Techniques For Infrared Focal Plane Array Readout Signals Process Circuits Design

The infrared detection and imaging technology has been commonly used for various areas including military search and track, medical examination, astronomy and commercial applications. Infrared focal plane array (IR FPA) imaging is the mainly used technique of the infrared detection and imaging technology at these days. And the readout signals process circuits are the most important parts of the IR FPA. In this thesis the key techniques of IR FPA readout signals process circuits design are studied.First, the development process of IR imaging systems, the IR FPAs, the IR detectors and the CMOS readout signals process circuits are introduced. Then, the readout unit-cells, the background current and dark current suppression (BDS) techniques and the readout signals process circuit architectures are analyzed, designed and verified.At last, the designed readout unit-cell, the designed unit-cell with the correlated double sampling (CDS) circuit which is designed as the Fixed-Patten-Noise (FPN) mitigate circuit and the designed BDS circuit are fabricated in Charter 0.35μm CMOS process. Both function and performance of the designed circuits have been verified by experimental results. The layout of comparator encodes based digitization readout circuit structure is designed. Both function and performance of proposed readout structure have been verified by simulation results.The creative works of this thesis include: the design of a high speed, low power consumption hysteresis CMOS clocked comparator which is used for the proposed digitization readout signals process circuit architectures; the design of a high injection, large dynamic range, stable detector bias, small area and low power consumption self-bias cascode current mirror based readout unit-cell; the design of a new background current and dark current suppression circuit for room-temperature IR FPA applications.