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Digital Readout Integrated Circuit For 1280×1024 Uncooled Infrared Focal Plane Array

Posted on:2021-03-03Degree:MasterType:Thesis
Country:ChinaCandidate:T LiuFull Text:PDF
GTID:2428330623968505Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of uncooled infrared imaging technology,its application in military and civilian fields is becoming more and more extensive.The uncooled infrared focal plane array is composed of an uncooled infrared detector pixel array and a readout circuit.Compared with the analog output,the digital output of the readout circuit is more conducive to subsequent processing,with high reliability,and the digital output is not easily interfered by noise.Readout circuits that meet the development requirements of larger arrays and smaller pixel focal planes and have high-performance digital processing capabilities are one of the important development directions of the current uncooled infrared focal plane arrays.This thesis focuses on the above-mentioned development direction,The readout integrated circuit with digital output for large uncooled infrared focal plane array and small pixel was studied and designed.The digital output of readout circuit with 1280 × 1024 uncooled infrared focal plane array is designed,and 14 bits ADC digital output is used for analog-to-digital conversion.The main content and results of this paper are as follows:1.This thesis is based on the main design requirements of the 1280 × 1024 uncooled infrared focal plane array digital readout circuit,including: 60 Hz working frame frequency,14 bits ADC digital output,using sub-array technology,parity column output and half-cycle counting method to reduce the system clock,the main clock frequency is calculated to be 333 MHz,the row integration time is 29?s,and the column selection time is 42 ns.The overall structure of the readout circuit is designed as two 1280 × 512 subarrays,and each sub-array performs parallel processing and output.2.In order to solve the problem of high-speed transmission of input clock and output data.Propose a new method of applying LVDS high-speed interface circuit to readout circuit.Designed the high-speed I/O interface circuit of the readout circuit—LVDS circuit The LVDS input circuit is used in the digital input control module,which is used in the digital input control module to convert the externally input differential clock signal into a single-ended signal inside the readout circuit.The LVDS output circuit is used for the ADC output module,and the ADC conversion result is differentially output to the off-chip.The input and output modules of the designed LVDS circuit have reached the transmission rate of 333 MHz.3.In order to meet the requirements of the digital readout circuit for the digital control circuit,a digital control circuit was designed,in which a new line protection circuit was designed to protect the pixel in order to prevent the pixel from being burned due to long-term selection.The design and simulation of other digital control modules were carried out,including static register writing module,main counter and line time generator,etc.,the transmission and writing functions of external input control data and the setting of line time were completed.Each module meets the design requirements.4.In order to realize the digital output,the digital readout channel is designed,focusing on the design of the column integrated 14 bits single slope ADC circuit,including a ramp generator module,a comparator circuit,an ADC conversion data transmission scheme—voltage current voltage conversion circuit,which ensures the digital readout function and simulation.The results show that the output frequency of the ADC is 333 MHz,DNL is +0.6LSB/-0.6LSB,and INL is +0.8LSB/-0.8LSB,SNR is 79.7858 dB,ENOB is 12.9415 bits,which meets the design requirements.The overall simulation results of the circuit show that the designed digital readout circuit has the functions of signal reading and digital output,and the errors are within the expected range,which meets the design requirementsThe research of this thesis laid a good foundation for the design of the digital readout circuit of the focal plane array with large pixel array and small pixel.
Keywords/Search Tags:uncooled infrared focal plane, large array, small pixel, digital output, LVDS high-speed interface circuit
PDF Full Text Request
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