Digital Circuit Function Modeling And Data Path Verification Method And System

With the rapid development of industrial technology,the scale of integrated circuits is increasing day by day.The huge scale of integrated circuit design has brought enormous challenges to the verification work.The chip verification work has occupied about twothirds of the design work,which has become the bottleneck of chip design.In response to the above problems,this topic has carried out research on the verification of integrated circuit functions.The research contents and innovations of the topics are mainly:1)In order to speed up the verification of integrated circuit design functions and shorten the verification period,we propose a function point model based on the phase transition relationship.This model is based on the design of the functional specification to explain the document extraction function point,hide the specific implementation of the design,do not have to describe all the finite state machines of the design implementation,not only overcome the problem of incomplete verification of simulation verification,but also solve the formal verification.A problem that is easy to produce a state explosion.2)In order to improve the verification efficiency of the data path,we propose a data path verification method based on the function point model.The knowledge base-based Corner case prediction strategy included in this verification method can solve the problem that the boundary conditions existing in the traditional data path verification process are difficult to cover.In addition,based on the huge verification difficulty of the data path verification space,the region segmentation strategy included in the verification method proposes to segment the verification space of the data path,and generate specific incentives for the smaller verification subspace to achieve efficient verification of the data path.3)Based on the above two parts,we designed and implemented an automated verification platform based on the function point model.After the verification engineer creates a function point model for the design to be tested,the automated verification platform can automatically generate a test bench for the DUT,thus solving the problem of the traditional manual test bench being time-consuming and error-prone.The automated generation of the verification platform and its good reusability greatly improve the verification efficiency.In order to verify the effectiveness of the function point model and the automated verification platform,we selected two different scale designs for functional verification.The experimental results show that using our proposed verification method can not only produce efficient test incentives,but also greatly shorten the verification.,and achieves the goal of speeding up the cycle of chip design.