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Design And Implementation Of High Frame Rate And High Grayscale Coding And Decoding System With High-speed Storing Module

Posted on:2020-12-25Degree:MasterType:Thesis
Country:ChinaCandidate:G D LiuFull Text:PDF
GTID:2428330602952340Subject:Engineering
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Along with the rapid development of infrared semi-physical simulation technology,infrared semi-physical simulation system puts forward higher requirement on the resolution,frame rate and grayscale of infrared image.Therefore,infrared target simulator,which is one of the key devices in infrared semi-physical simulation system,needs to have the ability of coding and decoding high resolution,high frame rate and high grayscale images.According to the requirement of infrared target simulator,we designed a high frame rate and high grayscale image coding and decoding system with high speed storing module.And we implemented image coding and decoding algorithm on the hardware platform.Firstly,according to the requirement of the system function,we designed the overall architecture of system which uses Xilinx kintex-7 series FPGA as the processor,DDR 3 SDRAM as the high-speed storage,and HDMI and DVI as the data transmission interface.Based on above,the article described the selection of the relevant chips and the design of the schematic.In addition,we implemented the PCB layout according to the schematic.Finally,we completed the production of the hardware platform.On the system hardware platform,we implemented the related sequential logic design by Verilog hardware description language programing.Firstly,we implemented the sequential logic design of DDR3 SDRAM by using MIG core.Then we implemented the sequential logic design of HDMI interface.Finally,the article implemented the sequential logic of the image coding and decoding algorithm and algorithm for reducing image frame rate.In the end of the article,the verification of the overall function of the system was described in detail by combining the system hardware and software.The verification process consists of physical layer verification and application layer verification.The physical layer verification is to verify the interface,storage and other function.And the application layer verification is to verify the image coding and decoding algorithm and reducing the frame rate of image.The maximum transmission pixel clock of system can reach 300 MHz,which can satisfy the coding and decoding processor for high frame rate and high grayscale image.
Keywords/Search Tags:FPGA, Image coding and decoding, Semi-physical Simulation, Target Simulator, High Speed Storing Module
PDF Full Text Request
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