Font Size: a A A

Verification And VIP Design Of TPM Module

Posted on:2020-10-17Degree:MasterType:Thesis
Country:ChinaCandidate:X Y LiuFull Text:PDF
GTID:2428330602452403Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of the integrated circuit industry,the application of So C is more and more extensive.Therefore,the market demand for So C is higher and higher.This improves the design scale and complexity of So C,and leads to the severe challenge of So C verification.In this paper,combines the author's work in a semiconductor company's project.the function and interface of TPM in So C are analyzed and the function points are extracted.The module-level verification of TPM is completed according to the extracted function points,and the TPM VIP is designed to connect to the system-level verification platform based on C-API to complete TPM verification at the system-level.Meanwhile,the reusability of the designed VIP is analyzed.In the module-level verification phase,The construction process of IP module-level verification platform based on UVM is explored in detail,and perform module-level verification according to the functional points extracted from TPM function analysis.The module-level verification is guided by coverage,functional coverage test group is integrated in the verification platform and sampled in the simulation process.The verification platform supports randomization constraints,configuring Candence‘s Vmanager tools for regression testing,collecting results after a large number of random test points,and using IMC tools to analyze the coverage of regression test results.After the module-level verification is completed,the code coverage and functional coverage reach 100%.At the system-level verification stage,firstly,it analyzes and explores the universality and specificity of IP configuration among different projects in the So C design process,and then puts forward the design idea of TPM VIP,integrates the general configuration into a library,designs the specific configuration into API.The designed TPM VIP satisfies the function of TPM module.The interaction between C and System Verilog is based on TRIGGER and MAILBOX mechanism in C-API.The C header and VIP module in VIP are connected to the system-level verification platform through the context API and module instantiation,and automatically generate different amount of configuration macro parameters and module instantiation by using the concept of parameter macro definition in the system.After completing the design of TPM VIP,the TPM VIP is used to verify the function of the TPM module on the system.It is not only the verification of the TPM module's behavior on the system,but also the reverse verification of TPM VIP.At this stage,the TPM VIP is designed to verify whether the interaction behavior of the TPM on the system is normal,including the checking of the core access register,the interrupt system coordination test,the transmission test,and the intersection trigger test,at the same time configure the special working mode of the system,verify the behavior of TPM under the special working mode of the system.After the system-level verification is completed,the toggle coverage of all ports in every TPM instantiations on So C reaches 100%.When TPM VIP is applied to other So C projects that reuse TPM modules,the system-level verification of TPM can be started by changing the parameter files.In the actual project operation process,the goal of integrating TPM VIP into the verification platform and starting system debugging within one day after the completion of the verification platform is realized,which greatly reduces the preparation time for starting system-level verification.
Keywords/Search Tags:UVM, Module-level, C-API, System-level, tb_padi, VIP
PDF Full Text Request
Related items