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High Level Design And Optimization Of Wireless Multimedia SoC Based On WPANs

Posted on:2007-01-05Degree:DoctorType:Dissertation
Country:ChinaCandidate:W YuFull Text:PDF
GTID:1118360215495364Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
With the rapid growth of multimedia application, the main work of this paper is on the background of wireless personal network. It focuses on the optimization of media access control (MAC) protocol, high level design methodlogy of communication protocol and system level low power design and implements a extensive research work on the wireless multimedia system on chip (SoC). The main contribution of this paper is as follows:1. The Delayed-ACK(Dly-ACK) scheme is used in IEEE 802.15.3 high-rate WPANs to reduce ACK overhead. Analyses of Imm-ACK and fixed Dly-ACK schemes for video streaming over IEEE 802.15.3 WPANs led to an application and channel quality aware adaptive Dly-ACK algorithm for video streaming over 802.15.3 WPANs, which includes a frame size and error-rate based dynamic Dly-ACK burst size adjusting algorithm. The simulation results show that the algorithm consistently outperforms both Imm-ACK and fixed Dly-ACK schemes for all simulated load levels and channel conditions in terms of the fraction of decodable video frames at 2%~4%.2. he VBR nature of IEEE 802.15.3 video traffic and vulnerability of wireless links pose many challenges for real time video streaming over WPANs. Toward the multiple video streaming channel time allocation problem, we propose an instantaneously highest-priority shortest weighted cost first channel time allocation algorithm with the aim to improve fraction of decodable frames. Simulation results show that the proposed algorithm outperforms previous algorithm significantly in terms of fraction of decodable frames without sacrifice of fairness.3. As implementation technology has evolved into increasingly complex integrated circuits and time-to-market pressure increases day by day, system level design issues become more critical in the context of system on Chip. In this paper, we present a transaction level modeling and verification method of IEEE 802.15.3 MAC chip based on SystemC 2.0, which include an accuracy video model and a transaction level system model of IEEE 802.15.3 MAC protocol. With the proposed scheme, the verification efficiency and accuracy will be greatly improved. Specially, the transaction level model can significantly reduce product development risk while avoiding expensive over-engineering by ensuring the architecture meets all performance, power and cost requirements prior to implementation, allowing design resources to focus on value-added functions.4. The new multimedia functionality of mobile products brings with it an increase in power consumption that is outpacing advances in battery technology. In order to solve this problem, statistical tests were carried out on relevant processor workload traces extracted from common video clips, which unequivocally establish the existence of self-similarity in burst period time series. Upon this attribute, an F-ARIMA model based way was presented to predict bursts of processor while playing multimedia application. Especially, a Dynamic Voltage Scale (DVS) policy, which scales clock frequency and core voltage adaptive to the workload burst period, is introduced to realize power savings in mobile systems.
Keywords/Search Tags:WPAN, Dly-ACK, Electronic System Level design, Transaction Level Module, Dynamic Voltage Scale
PDF Full Text Request
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