| In recent years,with the development of integrated circuits and the rise of the Internet of Things,fingerprint recognition technology has become the most mature technology in many biometric identification technologies,and it is also the most widely used technology.At present,there are mainly fingerprint recognition technologies based on three principles: optical fingerprint recognition,capacitive fingerprint recognition and ultrasonic fingerprint recognition.Among them,capacitive fingerprint sensors have the lowest cost and small size,so they are the most widely used.Traditional capacitive fingerprint recognition sensors need to work with metal rings to work properly.The excitation signal emitted by the transmitting circuit is conducted to the finger through the metal ring,and the finger is used as a conductor(a pole of the capacitor)coupled with the array of the plate of the detecting unit to form an array of sensing capacitors.Since the distance between the finger ridge and the valley and the chip metal plate is different,the size of the sensing capacitor is also different.The detection circuit inside the chip can determine the distribution of the ridge and the feature point by detecting the capacitance value of each capacitor array.A fingerprint image is obtained,and this scheme is called active fingerprint recognition.However,when the metal ring is not allowed in the structure(such as the under glass solution),the driving ability is insufficient due to the absence of the excitation signal on the finger,so that the fingerprint signal cannot penetrate the glass or the cover.In this case,it can be considered that the driving signal is connected to the ground of the fingerprint sensing chip,and the excitation on the driving signal can form a more effective sensing capacitance between the finger and the ground.Since the driving circuit and the fingerprint sensor have different ground potentials,it is necessary to additionally design a driving chip.In this paper,a cooperating driver chip is designed for the capacitive fingerprint chip.It is designed in Silterra 0.18?m CMOS process.The Cadence and Calibre series tools are used to complete the overall circuit design and layout design.The overall chip length and width are 1199.2 ?m and 648.3 ?m,and the overall layout area is about 0.7774 mm2.From the simulation results,under the power supply voltage of 3.3V,the load capacity of the driver chip designed in this paper is designed with 100 pF capacitor in the 1ns rise time.The power consumption of the chip is 4.97 m W.The LDO implements a conversion from a 3.3V supply voltage to a 1.8V output voltage to power the duty cycle modulation circuit.The LDO's maximum output current is 10 m A,and loop stability meets design requirements.The level shifting circuit achieves a 3.3V to 1.8V conversion.The full differential two-stage op amp circuit has a low frequency gain of 91.4d B,a unity gain bandwidth of 51 MHz,and a phase margin of 75 degrees.The duty cycle modulation circuit realizes the modulation of the clock cycle of the output signal of the level shifting circuit.After the modulation is completed,the clock duty of the output signal of the circuit is stabilized at 50%.The signal finally achieves an improvement in the driving ability of the signal by the driving enhancement circuit and reaches the design target value. |
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