Design And Implementation Of 14 Bits 1.6GSPS Segmented Current-Steering D/A Converter

In the past ten years,thanks to the great progress of integrated circuits,digital,intelligent and networked modern electronic systems have become the main features of the electronic information age,and digital signal processing technology has become the core of the system information processing.On the other hand,human beings are in a natural world which are full of analog signals,and the information processed by the digital system comes from nature and feeds back into nature.Because the analog signal changes continuously in time and amplitude,and the digital signal is only a discrete signal characterized by "0" and "1",the realization of the digital system can not be separated from the conversion of the two.Data converters included analog-to-digital converter(A/D converter,ADC)and digital-to-analog converter(D/A converter,DAC).ADC and DAC implement analog-to-digital and digital-to-analog transformations respectively.This thesis will study the DAC.The DAC with current steering structure has the characteristics of high accuracy conversion at high sampling rate,and is compatible with the standard process and meets the development requirements of digital system.Therefore,this thesis mainly based on0.18?m 2P4 M CMOS process to complete the design of 14-bit 1.6GSPS current steering DAC.The design uses a dual power supply,the output adopts a differential structure,the maximum full output current is 20 mA,through the external 50? resistor voltage output.The chapters are organized as follows: 1.The parameter index of the digital to analog converter is given to confirm the expected goal to be achieved by this design.2.The dynamic and static performance index of DAC is briefly summarized,and the main structure of DAC is given,and the segmented current steering structure using(5+4+5)is determined through analysis.3.The analysis of the current source of non-ideal factors,such as matching error,limited output impedance,for the specific circuit design to do a good job of theoretical groundwork.4.The design of the internal key function module circuit,such as bandgap reference(BGR),voltage-current(V-I)conversion circuit,and the module circuit and the overall circuit is simulated verified,from the simulation results,the indicators meet the functional requirements.5.The layout of DAC is designed,the overall design principle is given and the layout of the key modules are explained separately,then the whole layout is given.Finally,the module circuit is connected to the whole circuit interface and verified by the whole simulation,which includes monotone simulation,setting time simulation,static performance simulation and spurious free dynamic range simulation.The simulation results show that when the sampling frequency is 1.6 GSPS,the DAC's DNL and INL are less than 0.5LSB,the setting time is 10.28 ns,and the overall spurious free dynamic range of the system is 61.52 dB.The whole simulation key index of DAC satisfies the design criterion.