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Investigation Of Reconfigurable Logic Functions Based On Complementary Memristive Structure

Posted on:2020-04-11Degree:MasterType:Thesis
Country:ChinaCandidate:S Y HuFull Text:PDF
GTID:2428330590458178Subject:Microelectronics and Solid State Electronics
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Ever since the integrated circuit was invented,people have been seeking for better circuit design scheme in terms of performance,power consumption and cost.With the coming of big data era,the problem of von Neumann bottleneck and storage wall in the traditional architecture is more and more serious,because of the separation of storage and computing process.So it is imperative to innovate in the current computing architecture.The idea of simultaneously computing and storing data in the same unit is expected to fundamentally change the way of information storage and processing in computers,solve the bottleneck and problems encountered by existing von Neumann architecture,and greatly improve the operating efficiency of computers.Memristor has attracted a lot of attention due to its advantages of high speed,low power consumption,high integration density,easy 3D stackable integration and compatibility with CMOS technology.Under the research of memristor-based reconfigurable logic circuits,this work adopted sequential logic method that has highest completeness and reconfigurability.Firstly,the Pt/HfO2/TiN complementary memristor structure was used as the basic operation unit,and its electrical properties were studied.On the basis of this,the implementation methods of16 Boolean logic functions were deduced by using the state logic expression,which were experimentally verified then.Using this method,arbitrary binary Boolean logic function can be realized in 3 steps,and the method to realize a specific logic is not unique,which endow the method with higher reconfigurabiliy and flexibility,and provide more optimization space for the subsequent complex function design.After that,taking advantage of the memristor crossbar array,a parallel 1-bit full adder that can be realized in8 cycles within a 4×3 array was designed and verified in simulation.Furthermore,based on1-bit full adder,an n-bit adder was designed using pipeline structure,which can greatly improve the efficiency of complex tasks.As the same time,the factors that affect the correctness of logic operation were discussed.Besides the sequential logic method,the maximum and minimum logic functions can also be realized in 1 cycle based on the same complementary memristor structure,but using the method with voltage inputs and voltage outputs.Then a simple comparator was designed with 4 memristors.More practically,by studying the principle of sorting network,a memristor-based data independent sorting network was designed.The operation method proposed in this dissertation is a systematic analysis of the memrisor-based reconfigurable sequential logic,as well as a further exploration of the new in-memory computing architecture.
Keywords/Search Tags:Memristor, Boolean logic, Reconfigurable sequential logic, Memristive crossbar, 1-bit full adder
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