| With the rapid development of science and technology,more and more electronic products have become part of our life.As the core of electronic products,semiconductor devices are widely used in digital-analog integrated circuits and semiconductor memory.As a new generation of semiconductor devices,power VD-MOS devices are widely used in aerospace,automotive electronics and daily miniaturized devices,and playing an increasingly important role in daily life.However,with the demand of high-power and high-current increasing,the most difficult problem in the current power device design and manufacturing industry is that how to balance the device performance,device size and source/drain parasitic on-resistance.Therefore,it is of long-term significance to study how to achieve balance between these three factors.This paper systematically establishes a two-dimensional semi-analytical model of power VD-MOS devices for circuit system simulation.The research is divided into the following four parts:firstly,the application areas of the power VD-MOS devices and the advantages and disadvantages of the traditional MOS devices are introduced.Meanwhile,the study is briefly summarized the development status and the significance of the research of the source/drain parasitic on-resistance of the power VD-MOS devices.In recent years,it is also important to mention that the latest developments in theoretical analysis,process manufacturing and new model establishment of power VD-MOS device on-resistance.Secondly,the study analyzes the electrical characteristics of the power VD-MOS device and briefly introduces the working principle of the device.The influencing factors and the technical difficulties of the source/drain parasitic on-resistance of the power VD-MOS device are described in detail by introducing the resistance of each component of the device.What's more,the study theoretically introduces the main analysis methods used in the current industry for power device modeling,including numerical calculation methods,analytical methods and semi-analytical methods.Then,according to the source/drain parasitic on-resistance characteristics and working principle of the power VD-MOS device,the rectangular equivalent element structure is divided into four relatively independent electron accumulation region,JFET region,N-drift region and substrates region.The state equation and boundary conditions under the constant field are determined by analyzing the law of carrier motion in each area,and set the connection conditions between the regions.The semi-analytical expression of the two-dimensional potential equation of each region of the model is solved by using the method of separation variable and Fourier orthogonal transformation.The system of equations solved by computer calculation software return the results to the equation which has achieved,and the potential values in the divided regions are obtained.According to the current continuity equation,source/drain parasitic on-resistance of the power VD-MOS device is finally determined..Finally,we compared the results of the parasitic on-resistance with the two-dimensional potential of the device by the central difference method and the Silvaco device simulation software.In addition,the influence of the parameters of the N-drift region of the device on the withstand voltage of the device is also analyzed.The results obtained from the two-dimensional semi-analytical model of the power VD-MOS device established in this paper are compared with the central difference method and the simulation software Silvaco.The maximum error is 2.56%.The semi-analytical expression can be used as a unified model for the characteristics of circuit simulators and power VD-MOS devices.It can also be used to determine the on-resistance in specific engineering practice.The resulting potential model has guiding significance for the safety research of power VD-MOS devices. |
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