Research On Parameter Extraction Of Through Silicon Via Interconnection In 3D Integrated Circuit

TSV is through between chip and chip,wafer and wafer fabrication of vertical conduction,to achieve the interconnection between the chip technology,it can make 3D package to achieve more functionality in the size of the chip,and the avoidance of high density interconnect 2D package of RC due to delay.As the interconnection of through silicon vias in three dimensional integrated circuits,the extraction of parasitic parameters will directly affect the performance of integrated circuits,such as power consumption,time delay and noise.Therefore,parasitic parameter extraction from through silicon vias is very important for the successful design of high performance chips.The capacitance parameter extraction method of through silicon via has been more mature.This paper focuses on the efficient extraction method about resistance and inductance of through silicon via.The numerical method is a commonly used method of through silicon via resistance and inductance parameters,most numerical method is only applicable to the analysis of through silicon via that is regular shap and smooth surface,for the actual production of the error can be difficult to be analyied and meet the actual requirements of 3D integrated circuits on through silicon via parameter extraction,and numerical calculation method singular pointin the process,but also need to transpose the matrix processing,calculation and analysismethods for integrated circuit model is therefore necessary and urgent.Based on the numerical method results are as follows:(1)with high surface ratio and smooth surface of through silicon via as the research object,according to a large number of factors affecting the calculateon analysis of the result of resistance and inductance parameters,combined with the fitting method to get the analytical solution of calculation of resistance and inductance with frequency variation;(2)considering the actual error production process will appear,a trapezoidal through silicon via model,analyzing the influence of angle parameters,get the trapezoidal through silicon via resistance inductance parameter calculation formula;(3)on the surface roughnesss of through silicon via parameter extraction were studied,rough surface simulation based on the surface regularity,influence analysis of different roughness the surface of through silicon via parameters,get rough surface resistance and inductance parameter calculation formula.A practical through silicon via model is established.In this paper,the calculated resistance and inductance parameters are more close to the actual situation.The calculated error obtained by the fitting method is less than 5%,which greatly improves the efficiency of parameter extraction.