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Optimization Of Parasitic Effects On Radio Frequency TSV Interposer

Posted on:2024-07-19Degree:MasterType:Thesis
Country:ChinaCandidate:W WuFull Text:PDF
GTID:2568307079473224Subject:Electronic information
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With the continuous development of semiconductor manufacturing technology,the integration of the chip has been greatly improved,and the performance of the chip has been significantly enhanced.However,the characteristic size of transistors is gradually approaching the physical limit now,and the improvement of chip performance meets a bottleneck.With the rise of applications such as 5G communication,artificial intelligence(AI)and Internet of things,the demand for high bandwidth,high computing power and low power consumption is becoming more and more intense.Three-dimensional(3-D)integrated circuit(IC)is a technology that uses throuth silicon vias(TSV)vertical interconnection technology to stack chips in three dimensions to achieve system integration.It can greatly improve the chip performance and is the most key technology to continue Moore’s Law.The radio frequency(RF)system is responsible for the transmission and reception of signals,which is a very important part of the circuit system.Because of the dominent position of CMOS in IC system,even if the RF manufacturing process is not compatible with CMOS,RF devices are expected to be integrated with CMOS devices in order to reduce the size and improve performance.3-D IC is the most feasible technical scheme to realize heterogeneous process integration,which also promotes the development of miniaturization of RF devices.With the continuous improvement of the operation frequency of the RF system,the signal transmission loss and crosstalk of the interconnects within the 3-D integrated RF devices will become serious.As a very important part of 3-D integrated RF devices,it is very necessary for TSV interposer to build a theoretical modeling,analyse the electrical performance and optimize design parameters.In this paper,the coaxially TSV transmission structure in RF TSV interposer is deeply studied,and the main research are as follows.1.Based on the basic theory of electromagnetic field,the functional expressions between parasitic parameters,physical size and material properties of coaxially TSV transmission structure is derived,and the electrical model of lumped parameters is established.The proposed model is simulated and compared up to 100 GHz by using three-dimensional full-wave simulation software to verify the correctness of the model.2.According to the analysis of the parasitic parameter expression according to the electrical model,it is concluded that the insulator thickness will affect the electrical performance of the TSV transmission structure,but because of its small variation range and the film uniformity is difficult to control,the insulating layer thickness is not the key parameter affecting the electrical performance.The influence of the distance between signal TSV and grounding TSV on electrical transmission characteristics is very important,and it is the key parameter for signal transmission optimization.The increase of TSV radius will lead to the decrease of the parasitic resistance of the circuit,thus reducing the insertion loss,but does not affect the return loss.The increase of TSV height and substrate height will increase the parasitic parameters of TSV,thus increasing the signal transmission loss.3.The characteristic impedance is approximately calculated,and an optimization scheme of impedance matching is proposed to quickly calculate the structure size needed for 50 Ω impedance matching.Further analysis based on the optimization scheme shows that there is a large signal transmission loss due to the impedance mismatch of the IMD layer.
Keywords/Search Tags:Three-Dimensional(3-D) Integrated Circuit(IC), Through Silicon Via(TSV), Coaxially Structure, Equivalent Circuit Model, Resistance-InductanceCapacitance-Conductance(RLCG) Parameters
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