Research And Design Of Silicon-Based RF And Millimeter-Wave Frequency Multiplers

The local oscillator signal generation circuit is the core module of the communication system.It provides local oscillator signal to transceiver and reference clock to digital circuit.So the performance of the local oscillator signal will have a great impact on the whole system.At the same time,with the continuous development of communication technology,we have the requirements of miniaturization,mobility and low power consumption for communication equipment.And CMOS technology has the characteristics of high integration,low cost and low power consumption,so it has received more and more attention and application in millimeter-wave systems.The generation of high-frequency signals is a key component of millimeter wave systems.With the increase of frequency,the generation of high performance millimeter-wave signals becomes more and more difficult.To solve this problem,it is common to use high efficiency frequency multipliers to convert low frequency signals to high frequency signals,while introducing no additional phase noise theoretically.The main work of this thesis includes the following aspects:1.Frequency multiplier related theory introduction.Firstly,the nonlinear analysis and calculation of the devices are carried out to obtain the harmonic components of the nonlinear device,which is the basis of realizing the frequency doubling function.Then the principle and theoretical analysis of active frequency doubler based on field effect tube are introduced.At the same time,the influence of difference signal error on the performance of push-push structure is analyzed.Finally,the common capacitors,inductors,transformers and balun are briefly introduced.2.A 66 GHz frequency quadrupler(FQ).The frequency quadrupler with high harmonic suppression and high conversion gain is designed for 5G millimeter-wave communication.The frequency quadrupler adopts two-stage frequency doublers cascade structure,its operating bandwidth is 14 GHz～18.8 GHz(29.3%),and the maximum conversion gain in band is 11.3d B.The fundamental rejection and the second harmonic rejection ratio in the band is greater than 35 d Bc.3.A 220 GHz terahertz frequency quadrupler.The frequency quadrupler is based on a 65-nm CMOS process with an improved push-to-push pair cascade.In order to drive the frequency doubler,each stage of the frequency doubler has a drive amplifier(DA);In order to reduce the loss,between the first stage frequency doubler and the second stage DA,slot-balun structure is adopted.The 3d B bandwidth of the FQ is 220GHz～244GHz(about 10%),the maximum conversion gain is-10 d B,and the harmonic rejection ratio is greater than 35 d Bc.4.A double and triple frequency multiplier.The frequency Multiplier can extract the second harmonic signal and the third harmonic signal from the primary coil and the secondary coil of the transformer respectively.In order to improve the fundamental rejection ratio of the output third harmonic signal,an injection locking buffer(ILB)is cascaded at the third harmonic output port.The bandwidth of the multiplier is 20.8 GHz～43.8GHz(74%),its output power is greater than-7d Bm,and the harmonic rejection ratio is greater than 25 d Bc.