The Design Of Emulation Platform For Radar Imaging Processor

The main task of the radar imaging processor is to complete the real-time sampling storage and imaging processing of radar echo signals.With the development of radar technology,the performance requirements of radar imaging processors are getting higher and higher.Firstly,it requires more bits of resolution and higher sampling rate in the echo signal sampling,while ensuring the real-time and reliability of data storage.Secondly,the system is required to have higher integration,lighter weight and stronger anti-interference ability.In addition,in order to assist the development of the imaging processor,verify its nomal operation,and avoid the huge cost brought by direct flight test,we also need to recover the collected echo signal according to the radar operating mode.Combined with above situation and project requirements,this thesis designs and implements a radar signal acquisition,storage and payback card based on PCIe interface,which together with imaging workstation,constitutes an emulation platform for radar imaging processor.The system can complete the real-time acquisition and storage of radar echo signals up to four channels,and perform imaging processing on the workstation.It can also extract the server's local radar emulation data or the measured radar echo data,and playback it to the radar imaging processor though four channels.This thesis starts with the basic theory of high-speed signal sampling and digital-to-analog conversion,comprehensively analyzes the project requirements,and proposes the overall design of the system.Secondly,the system hardware circuit schematic design is divided into sampling module,playback module,storage module and other four modules for detailed description.Combined with the theory of signal integrity and power integrity,the thesis introduces the PCB design ideas and methods,and achieves hardware circuit design.And the system power supply,clock,and storage module circuits were tested to verify the correctness of the hardware circuit design.Then,the FPGA logic design is introduced,mainly including four parts: chip configuration logic,high-speed data transmission and receiving logic,DDR3 cache logic,and PCIe interface control logic.Then,according to the project index,the system performance index and functions are fully tested and analyzed.In the end,this thesis summarizes the research content and combines with the problems encountered in the design proposes improvement plans.