Study On The Key Techoniques Of The Real-Time Signal Processor For A Mini-SAR

The combination of mini-UAV platform and frequency modulated continuous wave(FMCW)synthetic aperture radar(SAR)system paves the way for high-resolution radar imaging with flexibility,low-cost and low-power.The FMCW SAR becomes one of the hotspots in the radar field.The signal processing is the core of the FMCW SAR.In this thesis,the imaging algorithm,the real-time imaging,the data storage and data playback,as well as the noise analysis and suppression are studied based on the developed FMCW SAR.The main contributions of this dissertation can be summarized as follows:1.Based on the characteristic of the FMCW SAR,its geometry model is introduced and the signal model is studied in ideal case.The mini-AV is small and there is no servo mechanism for antenna,so the motion error of the FMCW SAR is large.Therefore,the signal model of the FMCW SAR in the presence of trajectory deviation is also introduced.Then the frequency scalling(FS)imaging algorithm and the motion compensation algorithm are studied.At last,the computation for the imaging is divided into the four aspects of calculations and its computational complexity is quantitatively analyzed.2.The real-time imaging for the FMCW SAR is studied.Considering the miniature requirement of the FMCM SAR,a real-time signal processor is designed with a field programmable gate array(FPGA)and a multi-core digital signal processor(DSP),based on a shared-memory hardware structure.The computation complexity of the FS algorithm is quantitatively analyzed.In order to satisfy the requirement of the computation complexity,a processing structure,where the data are processed by the eight cores of the DSP in parallel and the algorithm is divided in pipeline,is designed to improve the computing power of the signal processor.Moreover,the enhanced direct memory access and Robin Scheduling are adopted to improve the data transfer rate.To achieve the high data transfer rate of the Serial Rapid I/O(SRIO)and the Double Date Rate3(DDR3)interface,these two interfaces are designed and implemented.The experimental results show that the data transfer rate of the SRIO and the DDR3 is high enough to satisfy the requirement of the imaging,and the real-time imaging is fulfilled by the developed signal processor.3.Considering the miniature requirement of the FMCW SAR,the functions of the data storage and data playback are integrated in the real-time processor.The data read/write opration of the CompactFlash(CF)card is the key operation of the data storage and data playback.For the CF card,one problem is the unpredictable response time of the flash translation layer(FTL),and the other is the relatively long response time of the file system.Two techniques,which are configurable buffer structure and FPFQA(FAT pre-and FDT quasi-allocation),respectively,are presented to solve the two problems of the CF card in the data storage.In order to aid the development of real-time imaging,the data playback is designed i.e.,the recorded raw data in the CF card are used as the data source,and the imaging is performed on the ground.There are two difficulties in the data playback.One is the realization of the cyclic redundancy check(CRC)in the data read operation of the CF card,and the other is long response time of the file system.The scheduling and realization method for the CRC operation is presented,and a method i.e.,the raw data for the data playback are sequential stored in the CF card and sequentially accessed,is proposed to solve the second difficulty.The evaluated performance indicates that the function of the high-speed data storage and the function of data playback are realized.The storage speed is approximately 121 MB/s and the real-time file management is realized.4.To meet the miniature requirement,a FMCW SAR puts tight constraint on the compactness,which may cause the interference among the subsystems.This thesis is to suppress the strong noise in the signal processing.Firstly,the quantitative analysis for the receiver thermal noise,the integrated sidelobes noise and the ambiguity noise is performed.Then the noise of the signal processor is quantitatively analyzed,which contains the quantization noise and the spurious noise of the analog-to-digital converter(ADC),and the processing quantization noise.It is found that a strong spurious noise of the ADC is introduced from interferences and significantly affects the image quality;the processing quantization noise level is decided by the parameters of the signal processing;the other noise components are sufficiently small,thus can be ignored.Then,the signal processing is designed properly to reduce the processing noise;a Fast Fourier Transform(FFT)based method of noise suppression is proposed to eliminate the ADC strong spurious noise,adopting an ADC and a FPGA.Finally,using the FMCW SAR data,the level of the noise components is measured and the effectiveness of the proposed noise suppression method is validated.The results show that the measured noise level coincides with the theoretical noise level,and the proposed noise suppression method effectively eliminates the ADC strong spurious noise.The developed signal processor of the FMCW SAR with the function of real-time imaging,high-speed data storage and data playback,as well as the proposed noise suppression method,had been verified in the trial of flight and the comprehensive test on the ground.