The Design Of High-speed And Real-time Signal Acquisition System Based On FPGA

In the sonar, radar and remote sensing field, the signal is generally above GHz frequency. The higher frequency sampling rate should be used to capture the signal. With the increase of sampling rate, how to improve the sampling accuracy and the performance of acquisition signal has become the very important issue. At the same time, the signal acquisition frequency and the data transmission rate will be higher. How to capture analog signal in real time has become a critical issue of data acquisition.With improvement in semiconductor fabrication technology, FPGA makes data collection and storage with new solutions. In order to realize the data high speed cache and transmission, the design of high speed data acquisition system is based on FPGA as the control core of the system.Aiming at the AD high speed data acquisition interface, a new self calibration using IODELAY method is used. The system uses the PCI bus as core to realize the computer and PCB borad data transmission. The board can be used at any standard 6U CPCI machine.Clock jitter can cause a sharp decline in the acquisition system performance. The method is to improve the clock source, the use of crossover filter, phase jitter noise reduction. This module generates 2.5GHz clock jitter less than 100 fs rms, and it can be used as acquisition system clock source.EV10AQ190 is the core chip of data acquisition system. The chip is composed of four AD CORE. Through four AD can achieve the highest sampling rate of 5Gsps. AD quantitative data through the FPGA example of DDR3 IP core to cache data to the SDRAM, finally it realizes the data transmission to the host computer via the PCI9054 bridge chip. Finally, the data acquisition system performance is analyzed and functionality is tested too. Test results show that the board supports universal acquisition modes. At 5Gsps sampling rate, system sampling precision can reach 7.7 or more.