Research On Low Power Physical Design Of Integrated Circuit Based On 16nm Process

From the history of semiconductor development,Moore's Law keeps on driving the development of the integrated circuit technology,design methodology and EDA tools.With increasing the integration of integrated circuits,the designer no long only consider the constraints of performance and area.Low power design methods are widely used in the integrated circuit.Power supply network has the parasitic parameters,such as resistance,capacitance.It will impact the delay calculation of each standard cell,and result the timing violation.So the back-end designers must solve IR Drop violation.Based on Cadence back-end design tool Innovus,the physical design of Core modules in multi-core processor chips is designed with UPF power consumption constraint file and 16 nm multi-threshold voltage process library in this paper.This CPU has four core modules,each core module is required to shut down,so the CPU is divided into five power domains,each core is regarded as one power domain independently.The chip use the multi supply multi voltage technology,the work voltage of each core module is 0.72 V,other parts is 0.5V.This design aims to control a reasonable voltage drop,and uses the power-off technology to achieve the function of cutting off the power domain supply when the Core module is idle,thus reducing the overall static power consumption of the chip.Based on the power shut off theory,power switch cells are added into the core module at floorplan stage in physical design flow.In order to ensure a reasonable IR Drop,the line widths and line spacing of the power supply and ground wires in each metal layer are designed and adjusted.Then based on the different power switch distributions,complete the back-end design flow,including: placement,clock tree synthesis,timing optimization and route,etc.,and summarize the key points in the physical design of the module.Finally,IR Drop and electromigration simulation analysis is for core module.And compare the IR Drop and EM result of stagger power switch distribution with the alignment power switch distribution.The different distribution of the power switch on the influence of IR Drop and electromigration and analysis the different power switch signal control chain on the influence of peak current.The simulation result shows that the stagger power switch distribution is better suitable than alignment power switch distribution in this physical design of core module,because its IR Drop result is better.Compared with alignment type power switch distribution,the IR Drop result of the staggered power switch distribution have about 5% optimization at early rail analysis,about 6% optimization at sign off stage.Because of the better IR Drop result,the optimization of the timing results is greater than 10%,it is helpful to closure timing.When the Core module is embedded into the CPU,it can effectively reduce the chip IR Drop.