Low-power Technology Research And Physical Implementation Of The 28nm GPU Design

Integrated circuits has been rising in performance and reliability with the development of semiconductor techniques. At the same time, electronic mobile devices are widely used in various fields, the complexity of the whole system power consumption are increased. All of these make the power consumption has become an important bottleneck in IC design.This thesis focuses on a 28nm low-power design and its physical implementation. Achieve the purpose of reducing power consumption under the premise of design performance. First of all, this thesis introduces the basic concepts of power consumption type and power analysis, including IR-drop, Ground bounce, EM. And introduce several methods commonly used in low-power design, such as power gating, gating clock, multi-threshold voltage and multi-power multi-voltage. And then focus on how these low-power technology applied in actual design. By analyzing the power line width and spacing and estimate data stream to obtain reasonable layout and planning of power, takes up less routing resources in ensuring the line is fully connected to the premise for the subsequent layout, aside more adequate of the wiring resources. Use Insert clock gating method to achieve dynamic power management for the chip, thus meet low-power design requirements. While the use of multi-threshold cell library design optimization of power consumption, significantly reducing the leakage power of the chip.Finally, use the power analysis tool to analyze the power consumption and voltage drop of the design, including the simulation of power consumption, get the gradient of IR-drop, and analyze the power-up time and rush-in current. The network of power gating can meet the requirements of security, stability and power consumption.