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Research And Design Of Continuous-Time Sigma-Delta Modulator

Posted on:2019-06-02Degree:MasterType:Thesis
Country:ChinaCandidate:W HuFull Text:PDF
GTID:2428330566995961Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the emerging intelligent information and technology represented by artificial intelligence(AI)?Internet of things(IoT)and fifth generation mobile communication(5G),it has brought a new challenges to the design of integrated circuit(IC),and the increasing growth of all kinds of high speed and high performance digital applications requires the same corresponding high speed and resolution ADC to support it.In recent years,the Sigma-Delta ADC has been developed rapidly due to its powerful advantages in digital circuit processing information.As an important component of SigmaDelta ADC,the analog modulator determines the speed and accuracy of the ADC system.Therefore,the main work of this paper is to design a continuous time Sigma-Delta modulator that can be applied in the field of digital audio.Based on the in-depth research of design principle and system architecture of continuous time Sigma-Delta modulator,combined with domestic and foreign research status as well as the field applications in this paper,the design of the target and architecture are determined.On the premise of maintaining sufficient design redundancy,the noise transfer function(NTF)and loop filter function have been designed.The behavior level architecture of the modulator is set up by using the Simulink toolbox in Matlab software,and the parameters of the system are verified and determined.The nonideality of each module in the modulator is then analyzed and calculated,including the finite dc gain and gain bandwidth of the op-amp,clock jitter,ELD and the influence of process deviation,etc.Finally,the design and simulation of the transistor level circuit are carried out according to the design indexes of each circuit module subunit.The article has designed a continuous time Sigma-Delta modulator with 3-order and 3-bit quantizer.In 1.3V,TSMC 65 nm CMOS process and works at a 64 MHz clock frequency and each process Corner,it has shown that the modulator's noise-distortion ratio(SNDR)achieves about 94 dB and the efficient number is larger than 15 bit within 1MHz bandwidth.The modulator has achieved the targets which can be applied in the corresponding audio and wireless field.
Keywords/Search Tags:Continuous-time Sigma-Delta, Non-idealities, Modulator, NTF, Rate
PDF Full Text Request
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