| The all kinds of information we are exposed to in everyday, for example: thetemperature, the pressure, the image and so on, are all analog signals. In the old days,we often used the analog circuits to process the information. However, in recent years,with the advent of the rapid development of digital electronic technology and verylarge scale integration (VLSI), we can process a large kind of information withsmaller area, lower power consumption, faster speed and higher accuracy in thedigital domain than in the analog domain. So, more and more people have a tendencyto process the information in digital domain. Sigma-Delta ADC has been rapiddevelopment because of these advantages. Although the digital filter of theSigma-Delta ADC consumes the largest area and power of the whole chip, howeverthe accuracy and rate of the ADC is determined by the Sigma-Delta modulator. So theresearch of the Sigma-Delta modulator becomes more and more important.After the depth study of the basic principles and components of continuous timeSigma-Delta modulator, I have used the Simulink of the Matlab to construct thebehavioral model, which is based on the design specifications. When the behavioralmodel meet the specification, I also used the Simulink to model the influence of thenon-ideality factors of the circuits, for example the gain and gain bandwidth of thedifferential amplifier, excess loop delay and so on, and get the specifications of thesub-circuit. Finally designed the circuits and layout.The article has designed a continuous time Sigma-Delta modulator with threeorders and four-bit quantizer. The presented Sigma-Delta modulator has been realizedin a1.8V,0.18μm CMOS process and achieves a SNDR of87.2dB within1MHzbandwidth. The modulator occupies an active die area of only300×400μm~2and has apower consumption of9mW. The modulator has achieved the targets that thebandwidth is larger than MHz and the ENOB is larger than14bit which is used in the wireless communication’s ADC. |
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