Low Power High Precision Continuous-time Sigma-Delta Modulator For Pressure Sensor Application

Pressure sensors are widely used in the domain of automobile and medical electronics.ADC as the core module largely determines the accuracy of pressure sensors.When the Sigma-Delta ADC converts the low frequency signal,it can achieve high precision with low-power with the use of oversampling and noise-shaping technologies.Compared to the discrete-time Sigma-Delta ADC,the continuous-time Sigma-Delta ADC can consume lower power.Based on this reason,the paper research the design of a high-precision and lowpower continuous-time Sigma-Delta modulator for pressure sensor application.This paper achieves low-power low noise by design and research of the system level.Paper deeply analyzes the CIFB architecture with favorable high frequency roll-off and the CIFF architecture with small amplitude of internal signals which is more suitable for the characteristics of low-voltage and low-power design and adopt the CIFF-B architecture which combines the advantages of CIFB and CIFF.In view of the fact that continuous-time Sigma-Delta modulator is sensitive to clock jitter,the FIR filter is added to the system-level,and the FIR DAC is designed based on the stability of modulator and power.The paper models a CIFF-B architecture third order single-bit quantization continuous-time SigmaDelta modulator based on the FIR DAC feedback with the use of the Impulse-Invariant Transformation and get the system-level design parameters.The paper obtains the design indexes of each module transistor level circuit by analyzing and modeling the non-ideal factors of each actual circuit module in the modulator and adopts Lfoundry 0.15?m CMOS technology and completes the design and simulation of transistor level circuit of modulator in Cadence.At the circuit level,considering that pressure sensor is used to measure the low-frequency signal,which is extremely sensitive to the flicker noise and dc offset of the transistor,so the chopping modulation is added to the first integrator.And under condition that the signal bandwidth is 1 kHz and oversampling rate is 512,the post-layout simulation result shows that the SNDR of modulator reached 104 dB and under the 1.65 V power supply,the power consumption of the modulator is only 176 ?W.