The Research Of Crosstalk Model And Self-adaption Of Delay On Interconnect

As the number of transistors integrated on an IC grows as the Moore's Law has predicted,high speed internet,smart phones and wearable devices are well-developed which depend on the hardware emerged,followed by the idea of internet of things(IOT).However,these new techniques require ICs that are much smaller,faster yet lower power consumption,which will lead to smaller and closer interconnects.Under that circumstance,the coupling between interconnects and delay can be a serious issue.To solve these problems,it is very important to model the interconnect.By setting up a simple and effective model of cross-talk and delay,not only the design of the circuits can be simplified,but also parameters can be provided for computer aided design software.This thesis mainly discussed and analyzed the problems related to interconnects coupling and delay.This thesis first obtained the formula for calculating the resistance,capacitance and conductance of the interconnect based on its physical structure.The Elmore model,fitted Elmore delay model as well as the transmission line model has been introduced.In addition,buffer insertion technique and line-width adjustment are compared.After that,this thesis focused on the crosstalk issue of the interconnect,introducing the principle from both capacitive coupling and conductive coupling two aspects.Moreover,a distributed RLC transmission line model was introduced based on Devgan model and Martin model.And there is amethod to calculate the crosstalk,whichis ABCD matrix method.In this thesis,considering the precision and time of compromise,the Martin model is modified.By comparing the HSPICE simulation results and Martin model,the rationality of the improved model was verified.In addition,separate analysis over delay and crosstalk was made,as well as the effect of crosstalk on delay.For capacitive crosstalk,it is calculated with a switch factor value to reflect the effect of crosstalk on delay.For the inductive crosstalk,time delay expression was obtained based on ABCD matrix method and Pade reduced-order technique.Based on the stochastic theory,we consider the calculation of the delay of multi-terminal interconnect nets with random walk based capacitance extraction.An adaptive accuracy-guaranteed method for calculating the interconnect delay has been proposed.In this work,the relationship between the stochastic errors of interconnectdelay and the stochastic errors of capacitances due to random walk algorithm has been derived,resulting to a theoretical upper bound of delay error.Then,two adaptive strategies are proposed for the accuracy-guaranteed delay calculation.One is based on the upper bound of delay error,and the other is based on an error fine-tuning approach.The method automatically adjusts the error threshold and the time of running the random walk based capacitance extraction,and employs a restoring extraction technique to largely reduce the runtime.The experimental results on interconnect structures from actual circuit layouts show that,the proposed method is able to guarantee the accuracy of calculated delay.And,the approach based on error fine-tuning is more efficient than the approach based on upper bound estimation of the delay error.The former reduces the total runtime including that for capacitance extraction to a small quantity while guaranteeing the stochastic delay error.