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Design Of Linear CCD Image Acquisition And Processing System Based On FPGA

Posted on:2018-03-05Degree:MasterType:Thesis
Country:ChinaCandidate:P H ShenFull Text:PDF
GTID:2348330536457474Subject:Mechanical and electrical engineering
Abstract/Summary:PDF Full Text Request
The common solution of a color sorter's image acquisition and processing system was FPGA,which implemented image acquisition,and CPU/DSP,which processed images by software in sequential order.This solution was complex,cannot meet the requirement of high real time performance.According to the above shortcomings,a solution that implemented image acquisition and image processing in a single FPGA chip was proposed in this paper.This new solution simplified the linear CCD image acquisition and processing system,and met the requirement of higher real time performance by a Hardware Description Language color sorting algorithm which processed image in parallel.Firstly,a hardware platform of the system was designed in this paper.After debugging,the circuit board worked well.Secondly,the logic design of linear CCD digital image acquisition module was implemented in this paper.Digital circuit was built inside an FPGA chip by Verilog HDL to drove linear CCD image sensor and its special AD converter,and then collected to the digital image signal of the photographed object.Online real time debugging verified the validity of the acquisition module logic design later.Thirdly,the logic design of linear CCD digital image cache and display module was implemented in this paper.The SDRAM controller was designed to cache the digital image and the VGA display controller was designed to display the linear CCD image.After debugging,the real-time images display verified the correctness of the cache and display module's logic design.Finally,the logic design of linear CCD digital image median filtering and color sorting algorithm was implemented in this paper.A median filter complemented in hardware description language was designed.According to the related research results about camellia oleifera color,a camellia oleifera color sorting algorithm was implemented in the FPGA,which accurately identified the inner shell,shell and seed of camellia oleifera,achieved the design goal.The following conclusions could be drawn after all the debugging and verification results in this paper:(1)the design goal of camellia oleifera image acquisition and image processing and recognition was achieved in this paper.(2)the solution that implemented linear CCD image acquisition and camellia oleifera image processing and recognition on one single FPGA chip is feasible.(3)image processing algorithm which implemented in Verilog HDL was much faster than which implemented in software based on CPU/DSP platform.
Keywords/Search Tags:FPGA, CCD, image acquisition, image processing, image caching
PDF Full Text Request
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