Research Of Digital Calibration Algorithm For Time-Interleaved ADCs

Higher requirements for the conversion speed and accuracy of ana log-to-digital converters(ADCs)have been put to meet the performance requirements of various electronic products.Among them,a Time-Interleaved Analog-to-Digital Converter(TI-ADC)which uses a plurality of high-precision sub-ADCs in parallel to increase the sampling rate achieves higher-speed and higher-accuracy.Unfortunately,the non-idealities that exist within the channel and between the channels severely limit the overall performance of the ADC.For example,due to limitations of the manufacturing process,timing mismatch will occur among the TI-ADC subchannels,which will cause the system dynamic performance to keep a linear ratio with the sub-ADC performance,which means that using higher-accuracy sub-ADCs cannot effectively improve the overall accuracy of the TI-ADC.This paper focuses on the timing mismatch in channel which is the most difficult to deal with.We firstly analyze the timing mismatch of TI-ADC and summarize some problems that need to be solved or perfected in mainstream calibration a lgorithms.In order to solve these problems,three fully digital calibration algorithms are designed in this paper.(1)A calibration structure based on the channel multiplexing technique is designed in this paper and its hardware complexity does not incre ase with the number of channels.With the calibration algorithm used in this paper,we can entirely solve the problem that the calibration direction may be wrong when the frequency of the input signal does not satisfy the Nyquist sampling theorem of sub-ADC.The bandwidth of system is expanded to enable the calibration of wide bandwidth input signals.(2)A correction algorithm for calibration direction is also proposed in this paper and it provides another solution to the problem that the calibration direc tion may be wrong when the frequency of the input signal does not satisfy the Nyquist sampling theorem of the sub-ADC.What's more,the bandwidth of the input signal could be expanded when combining it and the adopted calibration algorithm.(3)A timing mismatch calibration algorithm of TI-ADC with reference channel is also designed in this paper.The variable step size LMS algorithm can be used to quickly calibrate the high accuracy TI-ADC.In addition,we designed a timing mismatch estimation algorithm based on the fact that the input signal is orthogonal to its derivative when there is no timing mismatch.The traditional Taylor-based timing mismatch compensation algorithm is also improved in this paper.The three designed calibration algorithms are verified on MATLAB/Simulink,Modelsim,and FPGA boards.When there is no timing mismatch,the ENOB of the TI-ADC are 8 Bits,12 Bits,and 20 Bits respectively.The FPGA verification result is as follows: ENOB is increased from 4.84 Bits,6.17 Bits,and 4.58 Bits before calibration to 7.81 Bits,11.80 Bits,and 19.54 Bits after calibration,respectively.