Simulation Research On Design And Application Of Multi-Negative Differential Resistance Graphene Nanoribbon FETs

Nowadays,integrated circuit has been accommodating two times components every 18 to 24 months according to Moore's law.The integration level is becoming higher as the characteristics of the device size becoming smaller.So the effects of quantum effect gradually emerges.Actions need to be done with the device processing technology and new material application to explore the development of electronic industry in the future.Graphene was stripped successfully in 2004,with its excellent planar structure and electrical properties graphene become a research hotspot in recent years,such as graphene-FET,flexible displays,solar cells,sensor and super capacitor,showing great application potential.Graphene has ultra high electron mobility,low resistivity,good thermal conductivity,high light transmittance and strength.Graphene naoribbon(GNR)can be gained by cutting large graphene and carbon nanotubes or precursor synthesis method,thus open the band gap of graphene,making it a suitable channel material which has the function of turning on and off.Its band gap is inversely proportional to the width of GNR.Although there is a long way to accomplish the application of graphene based electronic devices,in the meantime,simulation calculation based on the transport theory and reality scene is necessary.On the one hand,simulation work can explore the various features of new materials;on the other hand,the performance of the device can be calculated and analyzed.Thus,this simulation work is for the purpose of exploring characteristics and functions of the graphene-based devices.The diversities of graphene band structure and regulatory methods produce numbers of interesting effects,including negative differential resistance effect,which is an important physical phenomenon.Transistors with negative resistance effect can build a multi-valued logic circuit.Multi-valued logic can carry high information density and effectively solve the parasitic and encapsulation problems of interconnects on integrated circuit chip.Based on nonequilibrium green's function under the tight-binding model,this paper used the simulation platform NanoTCAD to calculate the characteristics of field effect transistor with different width of GNR heterojunction channel.Using the property of different width GNR has different band gap,the wide-narrow-wide quantum well structure was built by narrow-wide-narrow GNR.Through the regulation of various parameters and simulation based on the principle of resonant tunneling,we designed a GNR-FET with multiple negative resistance current.Then the negative resistance current transport mechanism was explained by combination method with band structure,local density of states,the transmission spectrum and current spectrum.The capacitance of the device and the effects of edge roughness on device performance were also analyzed.Finally,we design a ternary inverter based on the double negative resistance GNR-FET with the theory of multiple-valued monostable to multistable transition logic element.Inverter is one of the basic composition of logic gates,its implementation is the basis of complete ternary logic implementation.The correctness of its function was simulatied through the SPICE platform.The main features of this paper is the research of multiple negative resistance devices that received less attention.Combined with excellent electrical properties of graphene and high-density signal carried by multiple negative resistance current,the basic element of multi-valued logic was designed.It can simplify circuit composition,achieve complex logic function,reduce the interconnect lines in multi-valued logic circuit and lay the theoretical foundation of integrated multi-valued logic circuits based on multiple negative resistance device.With high integration and high loss in electronic industry and the physical limits in device feature size,our work is expected to offer solution of small volume,good performance,high effciency and low power consumption based on the combination of low dimension materials,electronic devices and multi-valued logic.